Commit 1b917ee7 authored by Leonardo Solis's avatar Leonardo Solis
Browse files

updated READMe

parent 48bf42ec
......@@ -10,3 +10,19 @@ source
**ofdock_taskpar_alt**: task-parallel version
# Update to a new branch
The FPGA program is made of 8 kernels:
`IC` `IE`
`GA` -> `GG` -> `Conform` -> -> `Store`
`LS` `IA`
The access to off-chip memory in order to update population and energy values is made in `GA`, `IC`, `GG`, `LS`, and `Store`.
The memory access seems to not be synchronized even though `mem_fence(CLK_GLOBAL_MEM_FENCE | CLK_CHANNEL_MEM_FENCE)` was used.
According to [this forum post](, it is better to make sure that memory accesses are performed within one kernel.
A new branch called `fusion` is create where `GA`, `IC`, `GG`, `LS`, and `Store` are merged into a single kernel `GA`.
That way the design doesn't rely anymore on `mem_fence`s.
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