Commit 6d3b4f2c authored by Leonardo Solis's avatar Leonardo Solis
Browse files

a little bit cleaner, kept block deeper chan

parent c313d04c
......@@ -44,8 +44,14 @@ channel char2 chan_Conf2Intrae_actmode;
channel char chan_Conf2Intrae_actmode;
// Send energy values from InterE & IntraE to genotype-senders (IC, GG, LSs)
channel float chan_Intere2StoreIC_intere __attribute__((depth(/*2*/MAX_POPSIZE)));
channel float chan_Intere2StoreGG_intere __attribute__((depth(/*2*/MAX_POPSIZE)));
#if 0
channel float chan_Intere2StoreIC_intere __attribute__((depth(2)));
channel float chan_Intere2StoreGG_intere __attribute__((depth(2)));
#endif
#if 1
channel float chan_Intere2StoreIC_intere __attribute__((depth(MAX_POPSIZE)));
channel float chan_Intere2StoreGG_intere __attribute__((depth(MAX_POPSIZE)));
#endif
/*
channel float chan_Intere2StoreLS_LS1_intere __attribute__((depth(2)));
channel float chan_Intere2StoreLS_LS2_intere __attribute__((depth(2)));
......@@ -57,8 +63,14 @@ channel float chan_Intere2StoreLS_LS7_intere __attribute__((depth(2)));
channel float chan_Intere2StoreLS_LS8_intere __attribute__((depth(2)));
channel float chan_Intere2StoreLS_LS9_intere __attribute__((depth(2)));
*/
channel float chan_Intrae2StoreIC_intrae __attribute__((depth(/*2*/MAX_POPSIZE)));
channel float chan_Intrae2StoreGG_intrae __attribute__((depth(/*2*/MAX_POPSIZE)));
#if 0
channel float chan_Intrae2StoreIC_intrae __attribute__((depth(2)));
channel float chan_Intrae2StoreGG_intrae __attribute__((depth(2)));
#endif
#if 1
channel float chan_Intrae2StoreIC_intrae __attribute__((depth(MAX_POPSIZE)));
channel float chan_Intrae2StoreGG_intrae __attribute__((depth(MAX_POPSIZE)));
#endif
/*
channel float chan_Intrae2StoreLS_LS1_intrae __attribute__((depth(2)));
channel float chan_Intrae2StoreLS_LS2_intrae __attribute__((depth(2)));
......
  • Again, as already mentioned here, putting the mem_fence(CLK_CHANNEL_MEM_FENCE) in between the channel reads instead of after both (in Krnl_GA), increases performances and does NOT hang anymore.

    The quality of docking appears to be acceptable for having only GA.

    This correct behavior might not happen in the full LGA circuit, which includes feedback channel loops to LS kernels.

    Edited by Leonardo Solis
  • mentioned in commit 8a736101

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