Commit cf094e98 authored by Leonardo Solis's avatar Leonardo Solis
Browse files

added #defines for pipe types op-status

parent 5a42dd22
......@@ -9,6 +9,17 @@
#define PIPE_DEPTH_64 64
#define PIPE_DEPTH_512 512
// Status of pipe operation
// Success: 0
// Failure: negative value, e.g.: -1, -2, etc
// Important: the evaluation of failure of "pipe-expr"
// must be done: (pipe-expr != PIPE_STATUS_SUCCESS),
// as a failure is characterize by any negative integer number.
typedef int nb_pipe_status;
#define PIPE_STATUS_SUCCESS 0
#define PIPE_STATUS_FAILURE -1
// Send active signal to IGL_Arbiter
// Resized to valid SDAccel depths: 16, 32, ...
pipe int chan_GA2IGL_IC_active __attribute__((xcl_reqd_pipe_depth(PIPE_DEPTH_16)));
......@@ -359,29 +370,18 @@ void Krnl_GA(
// Read energy
float energyIA_IC_rx;
float energyIE_IC_rx;
/*
bool intra_valid = false;
bool inter_valid = false;
*/
int intra_valid = 1;
int inter_valid = 1;
/*
while( (intra_valid == false) || (inter_valid == false)) {
*/
nb_pipe_status intra_valid = PIPE_STATUS_FAILURE;
nb_pipe_status inter_valid = PIPE_STATUS_FAILURE;
__attribute__((xcl_pipeline_loop))
LOOP_WHILE_GA_IC_INNER_READ_ENERGY:
while( (intra_valid != 0) || (inter_valid != 0)) {
while( (intra_valid != PIPE_STATUS_SUCCESS) || (inter_valid != PIPE_STATUS_SUCCESS)) {
/*
if (intra_valid == false) {
*/
if (intra_valid != 0) {
if (intra_valid != PIPE_STATUS_SUCCESS) {
intra_valid = read_pipe(chan_Intrae2StoreIC_intrae, &energyIA_IC_rx);
}
/*
else if (inter_valid == false) {
*/
else if (inter_valid != 0) {
else if (inter_valid != PIPE_STATUS_SUCCESS) {
inter_valid = read_pipe(chan_Intere2StoreIC_intere, &energyIE_IC_rx);
}
}
......@@ -642,29 +642,18 @@ void Krnl_GA(
// Read energy
float energyIA_GG_rx;
float energyIE_GG_rx;
/*
bool intra_valid = false;
bool inter_valid = false;
*/
int intra_valid = 1;
int inter_valid = 1;
/*
while( (intra_valid == false) || (inter_valid == false)) {
*/
nb_pipe_status intra_valid = PIPE_STATUS_FAILURE;
nb_pipe_status inter_valid = PIPE_STATUS_FAILURE;
__attribute__((xcl_pipeline_loop))
LOOP_WHILE_GA_INNER_READ_ENERGIES:
while( (intra_valid != 0) || (inter_valid != 0)) {
/*
if (intra_valid == false) {
*/
if (intra_valid != 0) {
while( (intra_valid != PIPE_STATUS_SUCCESS) || (inter_valid != PIPE_STATUS_SUCCESS)) {
if (intra_valid != PIPE_STATUS_SUCCESS) {
intra_valid = read_pipe(chan_Intrae2StoreGG_intrae, &energyIA_GG_rx);
}
/*
else if (inter_valid == false) {
*/
else if (inter_valid != 0) {
else if (inter_valid != PIPE_STATUS_SUCCESS) {
inter_valid = read_pipe(chan_Intere2StoreGG_intere, &energyIE_GG_rx);
}
......@@ -750,103 +739,55 @@ void Krnl_GA(
float2 evalenergy_tmp7;
float2 evalenergy_tmp8;
float2 evalenergy_tmp9;
/*
bool ls1_done = false;
bool ls2_done = false;
bool ls3_done = false;
bool ls4_done = false;
bool ls5_done = false;
bool ls6_done = false;
bool ls7_done = false;
bool ls8_done = false;
bool ls9_done = false;
*/
int ls1_done = 1;
int ls2_done = 1;
int ls3_done = 1;
int ls4_done = 1;
int ls5_done = 1;
int ls6_done = 1;
int ls7_done = 1;
int ls8_done = 1;
int ls9_done = 1;
/*
while( (ls1_done == false) ||
(ls2_done == false) ||
(ls3_done == false) ||
(ls4_done == false) ||
(ls5_done == false) ||
(ls6_done == false) ||
(ls7_done == false) ||
(ls8_done == false) ||
(ls9_done == false)
*/
nb_pipe_status ls1_done = PIPE_STATUS_FAILURE;
nb_pipe_status ls2_done = PIPE_STATUS_FAILURE;
nb_pipe_status ls3_done = PIPE_STATUS_FAILURE;
nb_pipe_status ls4_done = PIPE_STATUS_FAILURE;
nb_pipe_status ls5_done = PIPE_STATUS_FAILURE;
nb_pipe_status ls6_done = PIPE_STATUS_FAILURE;
nb_pipe_status ls7_done = PIPE_STATUS_FAILURE;
nb_pipe_status ls8_done = PIPE_STATUS_FAILURE;
nb_pipe_status ls9_done = PIPE_STATUS_FAILURE;
__attribute__((xcl_pipeline_loop))
LOOP_WHILE_GA_LS_INNER_READ_ENERGIES:
while( (ls1_done != 0) ||
(ls2_done != 0) ||
(ls3_done != 0) ||
(ls4_done != 0) ||
(ls5_done != 0) ||
(ls6_done != 0) ||
(ls7_done != 0) ||
(ls8_done != 0) ||
(ls9_done != 0)
while( (ls1_done != PIPE_STATUS_SUCCESS) ||
(ls2_done != PIPE_STATUS_SUCCESS) ||
(ls3_done != PIPE_STATUS_SUCCESS) ||
(ls4_done != PIPE_STATUS_SUCCESS) ||
(ls5_done != PIPE_STATUS_SUCCESS) ||
(ls6_done != PIPE_STATUS_SUCCESS) ||
(ls7_done != PIPE_STATUS_SUCCESS) ||
(ls8_done != PIPE_STATUS_SUCCESS) ||
(ls9_done != PIPE_STATUS_SUCCESS)
)
{
/*
if (ls1_done == false) {
*/
if (ls1_done != 0) {
if (ls1_done != PIPE_STATUS_SUCCESS) {
ls1_done = read_pipe(chan_LS2GA_LS1_evalenergy, &evalenergy_tmp1);
}
/*
else if (ls2_done == false) {
*/
else if (ls2_done != 0) {
else if (ls2_done != PIPE_STATUS_SUCCESS) {
ls2_done = read_pipe(chan_LS2GA_LS2_evalenergy, &evalenergy_tmp2);
}
/*
else if (ls3_done == false) {
*/
else if (ls3_done != 0) {
else if (ls3_done != PIPE_STATUS_SUCCESS) {
ls3_done = read_pipe(chan_LS2GA_LS3_evalenergy, &evalenergy_tmp3);
}
/*
else if (ls4_done == false) {
*/
else if (ls4_done != 0) {
else if (ls4_done != PIPE_STATUS_SUCCESS) {
ls4_done = read_pipe(chan_LS2GA_LS4_evalenergy, &evalenergy_tmp4);
}
/*
else if (ls5_done == false) {
*/
else if (ls5_done != 0) {
else if (ls5_done != PIPE_STATUS_SUCCESS) {
ls5_done = read_pipe(chan_LS2GA_LS5_evalenergy, &evalenergy_tmp5);
}
/*
else if (ls6_done == false) {
*/
else if (ls6_done != 0) {
else if (ls6_done != PIPE_STATUS_SUCCESS) {
ls6_done = read_pipe(chan_LS2GA_LS6_evalenergy, &evalenergy_tmp6);
}
/*
else if (ls7_done == false) {
*/
else if (ls7_done != 0) {
else if (ls7_done != PIPE_STATUS_SUCCESS) {
ls7_done = read_pipe(chan_LS2GA_LS7_evalenergy, &evalenergy_tmp7);
}
/*
else if (ls8_done == false) {
*/
else if (ls8_done != 0) {
else if (ls8_done != PIPE_STATUS_SUCCESS) {
ls8_done = read_pipe(chan_LS2GA_LS8_evalenergy, &evalenergy_tmp8);
}
/*
else if (ls9_done == false) {
*/
else if (ls9_done != 0) {
else if (ls9_done != PIPE_STATUS_SUCCESS) {
ls9_done = read_pipe(chan_LS2GA_LS9_evalenergy, &evalenergy_tmp9);
}
}
......
......@@ -40,75 +40,47 @@ void Krnl_IGL_Arbiter(/*unsigned char DockConst_num_of_genes*/
__attribute__((xcl_pipeline_loop))
LOOP_WHILE_IGL_MAIN:
while(active) {
/*
bool Off_valid = false;
bool IC_valid = false;
bool GG_valid = false;
bool LS1_end_valid = false;
bool LS2_end_valid = false;
bool LS3_end_valid = false;
bool LS4_end_valid = false;
bool LS5_end_valid = false;
bool LS6_end_valid = false;
bool LS7_end_valid = false;
bool LS8_end_valid = false;
bool LS9_end_valid = false;
*/
int Off_valid = 1;
int IC_valid = 1;
int GG_valid = 1;
int LS1_end_valid = 1;
int LS2_end_valid = 1;
int LS3_end_valid = 1;
int LS4_end_valid = 1;
int LS5_end_valid = 1;
int LS6_end_valid = 1;
int LS7_end_valid = 1;
int LS8_end_valid = 1;
int LS9_end_valid = 1;
/*bool Off_active; */ int Off_active;
/*bool IC_active; */ int IC_active;
/*bool GG_active; */ int GG_active;
/*bool LS1_end_active; */ int LS1_end_active;
/*bool LS2_end_active; */ int LS2_end_active;
/*bool LS3_end_active; */ int LS3_end_active;
/*bool LS4_end_active; */ int LS4_end_active;
/*bool LS5_end_active; */ int LS5_end_active;
/*bool LS6_end_active; */ int LS6_end_active;
/*bool LS7_end_active; */ int LS7_end_active;
/*bool LS8_end_active; */ int LS8_end_active;
/*bool LS9_end_active; */ int LS9_end_active;
/*
while (
(Off_valid == false) &&
(IC_valid == false) &&
(GG_valid == false) &&
(LS1_end_valid == false) &&
(LS2_end_valid == false) &&
(LS3_end_valid == false) &&
(LS4_end_valid == false) &&
(LS5_end_valid == false) &&
(LS6_end_valid == false) &&
(LS7_end_valid == false) &&
(LS8_end_valid == false) &&
(LS9_end_valid == false)
*/
nb_pipe_status Off_valid = PIPE_STATUS_FAILURE;
nb_pipe_status IC_valid = PIPE_STATUS_FAILURE;
nb_pipe_status GG_valid = PIPE_STATUS_FAILURE;
nb_pipe_status LS1_end_valid = PIPE_STATUS_FAILURE;
nb_pipe_status LS2_end_valid = PIPE_STATUS_FAILURE;
nb_pipe_status LS3_end_valid = PIPE_STATUS_FAILURE;
nb_pipe_status LS4_end_valid = PIPE_STATUS_FAILURE;
nb_pipe_status LS5_end_valid = PIPE_STATUS_FAILURE;
nb_pipe_status LS6_end_valid = PIPE_STATUS_FAILURE;
nb_pipe_status LS7_end_valid = PIPE_STATUS_FAILURE;
nb_pipe_status LS8_end_valid = PIPE_STATUS_FAILURE;
nb_pipe_status LS9_end_valid = PIPE_STATUS_FAILURE;
int Off_active;
int IC_active;
int GG_active;
int LS1_end_active;
int LS2_end_active;
int LS3_end_active;
int LS4_end_active;
int LS5_end_active;
int LS6_end_active;
int LS7_end_active;
int LS8_end_active;
int LS9_end_active;
__attribute__((xcl_pipeline_loop))
LOOP_WHILE_IGL_INNER:
while (
(Off_valid != 0) &&
(IC_valid != 0) &&
(GG_valid != 0) &&
(LS1_end_valid != 0) &&
(LS2_end_valid != 0) &&
(LS3_end_valid != 0) &&
(LS4_end_valid != 0) &&
(LS5_end_valid != 0) &&
(LS6_end_valid != 0) &&
(LS7_end_valid != 0) &&
(LS8_end_valid != 0) &&
(LS9_end_valid != 0)
(Off_valid != PIPE_STATUS_SUCCESS) &&
(IC_valid != PIPE_STATUS_SUCCESS) &&
(GG_valid != PIPE_STATUS_SUCCESS) &&
(LS1_end_valid != PIPE_STATUS_SUCCESS) &&
(LS2_end_valid != PIPE_STATUS_SUCCESS) &&
(LS3_end_valid != PIPE_STATUS_SUCCESS) &&
(LS4_end_valid != PIPE_STATUS_SUCCESS) &&
(LS5_end_valid != PIPE_STATUS_SUCCESS) &&
(LS6_end_valid != PIPE_STATUS_SUCCESS) &&
(LS7_end_valid != PIPE_STATUS_SUCCESS) &&
(LS8_end_valid != PIPE_STATUS_SUCCESS) &&
(LS9_end_valid != PIPE_STATUS_SUCCESS)
){
Off_valid = read_pipe(chan_IGLArbiter_Off, &Off_active);
IC_valid = read_pipe(chan_GA2IGL_IC_active, &IC_active);
......@@ -123,10 +95,8 @@ void Krnl_IGL_Arbiter(/*unsigned char DockConst_num_of_genes*/
LS8_end_valid = read_pipe(chan_LS2Arbiter_LS8_end, &LS8_end_active);
LS9_end_valid = read_pipe(chan_LS2Arbiter_LS9_end, &LS9_end_active);
}
/*
active = Off_valid ? 0x00 : 0x01;
*/
active = (Off_valid == 0)? 0x00 : 0x01;
active = (Off_valid == PIPE_STATUS_SUCCESS)? 0x00 : 0x01;
bool mode_LS_bool [9];
......@@ -140,16 +110,16 @@ void Krnl_IGL_Arbiter(/*unsigned char DockConst_num_of_genes*/
// This considers all possible cases as all LS could be
// potentially producing genotypes simultaneously.
if (active == 0x01) {
if ((IC_valid != 0) && (GG_valid != 0)) {
if (LS1_end_valid == 0) {mode_LS_bool [0] = true; /*printf("LS1 valid!\n");*/}
if (LS2_end_valid == 0) {mode_LS_bool [1] = true; /*printf("LS2 valid!\n");*/}
if (LS3_end_valid == 0) {mode_LS_bool [2] = true; /*printf("LS3 valid!\n");*/}
if (LS4_end_valid == 0) {mode_LS_bool [3] = true; /*printf("LS4 valid!\n");*/}
if (LS5_end_valid == 0) {mode_LS_bool [4] = true; /*printf("LS5 valid!\n");*/}
if (LS6_end_valid == 0) {mode_LS_bool [5] = true; /*printf("LS6 valid!\n");*/}
if (LS7_end_valid == 0) {mode_LS_bool [6] = true; /*printf("LS7 valid!\n");*/}
if (LS8_end_valid == 0) {mode_LS_bool [7] = true; /*printf("LS8 valid!\n");*/}
if (LS9_end_valid == 0) {mode_LS_bool [8] = true; /*printf("LS9 valid!\n");*/}
if ((IC_valid != PIPE_STATUS_SUCCESS) && (GG_valid != PIPE_STATUS_SUCCESS)) {
if (LS1_end_valid == PIPE_STATUS_SUCCESS) {mode_LS_bool [0] = true; /*printf("LS1 valid!\n");*/}
if (LS2_end_valid == PIPE_STATUS_SUCCESS) {mode_LS_bool [1] = true; /*printf("LS2 valid!\n");*/}
if (LS3_end_valid == PIPE_STATUS_SUCCESS) {mode_LS_bool [2] = true; /*printf("LS3 valid!\n");*/}
if (LS4_end_valid == PIPE_STATUS_SUCCESS) {mode_LS_bool [3] = true; /*printf("LS4 valid!\n");*/}
if (LS5_end_valid == PIPE_STATUS_SUCCESS) {mode_LS_bool [4] = true; /*printf("LS5 valid!\n");*/}
if (LS6_end_valid == PIPE_STATUS_SUCCESS) {mode_LS_bool [5] = true; /*printf("LS6 valid!\n");*/}
if (LS7_end_valid == PIPE_STATUS_SUCCESS) {mode_LS_bool [6] = true; /*printf("LS7 valid!\n");*/}
if (LS8_end_valid == PIPE_STATUS_SUCCESS) {mode_LS_bool [7] = true; /*printf("LS8 valid!\n");*/}
if (LS9_end_valid == PIPE_STATUS_SUCCESS) {mode_LS_bool [8] = true; /*printf("LS9 valid!\n");*/}
}
} // End if (active == 0x01)
......@@ -165,15 +135,15 @@ void Krnl_IGL_Arbiter(/*unsigned char DockConst_num_of_genes*/
const char mode_GG = 'G';
const char mode_LS [9] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09};
if (Off_valid == 0) {
if (Off_valid == PIPE_STATUS_SUCCESS) {
enable_write_channel = (j==0)? true:false;
mode_tmp = mode_Off;
}
else if (IC_valid == 0) {
else if (IC_valid == PIPE_STATUS_SUCCESS) {
enable_write_channel = (j==0)? true:false;
mode_tmp = mode_IC;
}
else if (GG_valid == 0) {
else if (GG_valid == PIPE_STATUS_SUCCESS) {
enable_write_channel = (j==0)? true:false;
mode_tmp = mode_GG;
}
......
......@@ -45,38 +45,22 @@ void Krnl_LS(
__attribute__((xcl_pipeline_loop))
LOOP_WHILE_LS_MAIN:
while(valid) {
/*
bool active;
*/
int active;
/*
bool valid_active= false;
*/
int valid_active= 1;
nb_pipe_status valid_active = PIPE_STATUS_FAILURE;
float current_energy;
/*
bool valid_energy = false;
*/
int valid_energy = 1;
nb_pipe_status valid_energy = PIPE_STATUS_FAILURE;
/*
while( (valid_active == false) && (valid_energy == false)) {
*/
__attribute__((xcl_pipeline_loop))
LOOP_WHILE_LS_ACTIVE:
while( (valid_active != 0) && (valid_energy != 0)) {
while( (valid_active != PIPE_STATUS_SUCCESS) && (valid_energy != PIPE_STATUS_SUCCESS)) {
valid_active = read_pipe(chan_GA2LS_Off1_active, &active);
valid_energy = read_pipe(chan_GA2LS_LS1_energy, &current_energy);
}
/*
valid = active || valid_energy;
*/
/*
valid = active || (valid_energy == 0);
*/
// (active == 1) means stop LS
valid = (active != 1) || (valid_energy == 0);
valid = (active != 1) || (valid_energy == PIPE_STATUS_SUCCESS);
if (valid) {
......@@ -250,29 +234,18 @@ while(valid) {
float energyIA_LS_rx;
float energyIE_LS_rx;
/*
bool intra_valid = false;
bool inter_valid = false;
*/
int intra_valid = 1;
int inter_valid = 1;
/*
while( (intra_valid == false) || (inter_valid == false)) {
*/
nb_pipe_status intra_valid = PIPE_STATUS_FAILURE;
nb_pipe_status inter_valid = PIPE_STATUS_FAILURE;
__attribute__((xcl_pipeline_loop))
LOOP_WHILE_LS_READ_ENERGIES:
while( (intra_valid != 0) || (inter_valid != 0)) {
/*
if (intra_valid == false) {
*/
if (intra_valid != 0) {
while( (intra_valid != PIPE_STATUS_SUCCESS) || (inter_valid != PIPE_STATUS_SUCCESS)) {
if (intra_valid != PIPE_STATUS_SUCCESS) {
intra_valid = read_pipe(chan_Intrae2StoreLS_LS1_intrae, &energyIA_LS_rx);
}
/*
else if (inter_valid == false) {
*/
else if (inter_valid != 0) {
else if (inter_valid != PIPE_STATUS_SUCCESS) {
inter_valid = read_pipe(chan_Intere2StoreLS_LS1_intere, &energyIE_LS_rx);
}
}
......
......@@ -45,37 +45,22 @@ void Krnl_LS2(
__attribute__((xcl_pipeline_loop))
LOOP_WHILE_LS2_MAIN:
while(valid) {
/*
bool active;
*/
int active;
/*
bool valid_active = false;
*/
int valid_active= 1;
nb_pipe_status valid_active = PIPE_STATUS_FAILURE;
float current_energy;
/*
bool valid_energy = false;
*/
int valid_energy = 1;
/*
while( (valid_active == false) && (valid_energy == false)) {
*/
nb_pipe_status valid_energy = PIPE_STATUS_FAILURE;
__attribute__((xcl_pipeline_loop))
LOOP_WHILE_LS2_ACTIVE:
while( (valid_active != 0) && (valid_energy != 0)) {
while( (valid_active != PIPE_STATUS_SUCCESS) && (valid_energy != PIPE_STATUS_SUCCESS)) {
valid_active = read_pipe(chan_GA2LS_Off2_active, &active);
valid_energy = read_pipe(chan_GA2LS_LS2_energy, &current_energy);
}
/*
valid = active || valid_energy;
*/
/*
valid = active || (valid_energy == 0);
*/
// (active == 1) means stop LS
valid = (active != 1) || (valid_energy == 0);
valid = (active != 1) || (valid_energy == PIPE_STATUS_SUCCESS);
if (valid) {
......@@ -251,29 +236,18 @@ while(valid) {
float energyIA_LS_rx;
float energyIE_LS_rx;
/*
bool intra_valid = false;
bool inter_valid = false;
*/
int intra_valid = 1;
int inter_valid = 1;
/*
while( (intra_valid == false) || (inter_valid == false)) {
*/
nb_pipe_status intra_valid = PIPE_STATUS_FAILURE;
nb_pipe_status inter_valid = PIPE_STATUS_FAILURE;
__attribute__((xcl_pipeline_loop))
LOOP_WHILE_LS2_READ_ENERGIES:
while( (intra_valid != 0) || (inter_valid != 0)) {
/*
if (intra_valid == false) {
*/
if (intra_valid != 0) {
while( (intra_valid != PIPE_STATUS_SUCCESS) || (inter_valid != PIPE_STATUS_SUCCESS)) {
if (intra_valid != PIPE_STATUS_SUCCESS) {
intra_valid = read_pipe(chan_Intrae2StoreLS_LS2_intrae, &energyIA_LS_rx);
}
/*
else if (inter_valid == false) {
*/
else if (inter_valid != 0) {
else if (inter_valid != PIPE_STATUS_SUCCESS) {
inter_valid = read_pipe(chan_Intere2StoreLS_LS2_intere, &energyIE_LS_rx);
}
}
......
......@@ -45,38 +45,22 @@ void Krnl_LS3(
__attribute__((xcl_pipeline_loop))
LOOP_WHILE_LS3_MAIN:
while(valid) {
/*
bool active;
*/
int active;
/*
bool valid_active = false;
*/
int valid_active= 1;
nb_pipe_status valid_active = PIPE_STATUS_FAILURE;
float current_energy;
/*
bool valid_energy = false;
*/
int valid_energy = 1;
nb_pipe_status valid_energy = PIPE_STATUS_FAILURE;
/*
while( (valid_active == false) && (valid_energy == false)) {
*/
__attribute__((xcl_pipeline_loop))
LOOP_WHILE_LS3_ACTIVE:
while( (valid_active != 0) && (valid_energy != 0)) {
while( (valid_active != PIPE_STATUS_SUCCESS) && (valid_energy != PIPE_STATUS_SUCCESS)) {
valid_active = read_pipe(chan_GA2LS_Off3_active, &active);
valid_energy = read_pipe(chan_GA2LS_LS3_energy, &current_energy);
}
/*
valid = active || valid_energy;
*/
/*
valid = active || (valid_energy == 0);
*/
// (active == 1) means stop LS
valid = (active != 1) || (valid_energy == 0);
valid = (active != 1) || (valid_energy == PIPE_STATUS_SUCCESS);