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ocladock-fpga
ocladock-fpga
Commit 9574082f authored by Leonardo Solis's avatar Leonardo Solis
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first commit branch gidel

parent 6babf6a9
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Showing with 2 additions and 2 deletions
init_aoc_esa.sh → init_aoc160_gidel.sh
View file @ 9574082f
......@@ -24,7 +24,7 @@ echo "ALTERAOCLSDKROOT: "
echo $ALTERAOCLSDKROOT
echo " "
export AOCL_BOARD_PACKAGE_ROOT=/opt/cad/altera/HARP2/BSP/bdw_fpga_pilot_opencl_bsp_v1.0.2
export AOCL_BOARD_PACKAGE_ROOT=~/BSP_AOC_GIDEL/Proc10A_16.0.2/
echo "AOCL_BOARD_PACKAGE_ROOT: "
echo $AOCL_BOARD_PACKAGE_ROOT
echo " "
......
ofdock_taskpar_alt/Makefile
View file @ 9574082f
......@@ -329,7 +329,7 @@ endif
# This flag was adapted only for host-compilation on celebdil using HARP2 BSP.
# Kernel compilation (emu, hw) must use the default flags.
AOCL_LINK_CONFIG_ADAPTED := -L/opt/cad/altera/altera-16.0/hld/linux64/lib -L/opt/cad/altera/HARP2/BSP/bdw_fpga_pilot_opencl_bsp_v1.0.2/host/linux64/lib -L$AALSDK/mybuild/myinstall/usr/local/lib -L/opt/cad/altera/altera-16.0/hld/host/linux64/lib -Wl,--no-as-needed -lalteracl
#AOCL_LINK_CONFIG_ADAPTED := -L/opt/cad/altera/altera-16.0/hld/linux64/lib -L/opt/cad/altera/HARP2/BSP/bdw_fpga_pilot_opencl_bsp_v1.0.2/host/linux64/lib -L$AALSDK/mybuild/myinstall/usr/local/lib -L/opt/cad/altera/altera-16.0/hld/host/linux64/lib -Wl,--no-as-needed -lalteracl
......
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