evaluate_ip.tcl.template 2.73 KB
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#
# Copyright (C) 2014 Jens Korinth, TU Darmstadt
#
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# This file is part of Tapasco (TPC).
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#
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# Tapasco is free software: you can redistribute it and/or modify
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# it under the terms of the GNU Lesser General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
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# Tapasco is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public License
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# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
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#
# @file		evaluate_ip.tcl.template
# @brief	Tcl template to get area and timing estimates for IPXACT cores.
# @authors	J. Korinth (jk@esa.cs.tu-darmstadt.de
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#
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# source base lib
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source -notrace "$::env(TAPASCO_HOME)/common/common.tcl"
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# suppress most messages except errors
set_msg_config -severity INFO -suppress
set_msg_config -severity WARNING -suppress
set_param general.maxThreads 1

# add files
add_files @@SRC_FILES@@
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# Read ngc/edif files, e.g. for primitives
foreach ngc_file [list @@NGC_FILES@@] { read_edif $ngc_file }
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# add_files -fileset constrs_1 @@XDC_FILES@@
foreach script [list @@TCL_FILES@@] { source $script }

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# find top
set top [lindex [find_top] 0]

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# synthesize and optimize netlist
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Jens Korinth committed
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synth_design \
  -part @@PART@@ \
  -top $top \
  -mode out_of_context \
  -directive AlternateRoutability \
  -retiming \
  -fanout_limit 400 \
  -fsm_extraction one_hot \
  -keep_equivalent_registers \
  -resource_sharing off \
  -no_lc \
  -shreg_min_size 5
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# read switching activity files (if any)
foreach saif [glob -nocomplain *.saif] {
  read_saif $saif
}

# write design checkpoint
write_checkpoint -force @@SYNTH_CHECKPOINT@@

# set clock
set clock_ports [get_ports -filter {DIRECTION == IN && (NAME =~ *clk* || NAME =~ *CLK*)}]
puts "clock_ports = $clock_ports"
create_clock -name clk -period @@PERIOD@@ $clock_ports
set_property HD.CLK_SRC BUFGCTRL_X0Y0 $clock_ports

# place and route
opt_design
place_design
phys_opt_design
route_design

# write design checkpoint
write_checkpoint -force @@IMPL_CHECKPOINT@@

# report timing
report_timing_summary -quiet -datasheet -file @@REPORT_TIMING@@
# report utilization
report_utilization -quiet -file @@REPORT_UTILIZATION@@

# recalculate achieved frequency and set new period (for realistic power values)
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set wns [tapasco::get_wns_from_timing_report @@REPORT_TIMING@@]
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if {$wns < 0} {
  create_clock -name clk -period [expr "@@PERIOD@@ - $wns"] $clock_ports
}

# report power
report_power -quiet -file @@REPORT_POWER@@

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# write netlist file
set netlist "@@NETLIST@@"
write_edif $netlist

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# done!
exit