mkBlueDMAVivado.v 32.7 KB
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//
// Generated by Bluespec Compiler, version 2015.09.beta2 (build 34689, 2015-09-07)
//
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// On Mon Jul 10 18:45:54 CEST 2017
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//
//
// Ports:
// Name                         I/O  size props
// S_AXI_arready                  O     1 reg
// S_AXI_rvalid                   O     1 reg
// S_AXI_rdata                    O    64
// S_AXI_rresp                    O     2
// S_AXI_awready                  O     1
// S_AXI_wready                   O     1
// S_AXI_bvalid                   O     1 reg
// S_AXI_bresp                    O     2
// m64_axi_arvalid                O     1 reg
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// m64_axi_arid                   O     1
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// m64_axi_araddr                 O    64
// m64_axi_arlen                  O     8
// m64_axi_arsize                 O     3
// m64_axi_arburst                O     2
// m64_axi_arlock                 O     1
// m64_axi_arcache                O     4
// m64_axi_arprot                 O     3
// m64_axi_arqos                  O     4
// m64_axi_arregion               O     4
// m64_axi_aruser                 O     1
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// m64_axi_rready                 O     1 reg
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// m64_axi_awvalid                O     1 reg
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// m64_axi_awid                   O     1
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// m64_axi_awaddr                 O    64
// m64_axi_awlen                  O     8
// m64_axi_awsize                 O     3
// m64_axi_awburst                O     2
// m64_axi_awlock                 O     1
// m64_axi_awcache                O     4
// m64_axi_awprot                 O     3
// m64_axi_awqos                  O     4
// m64_axi_awregion               O     4
// m64_axi_awuser                 O     1
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// m64_axi_wvalid                 O     1 reg
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// m64_axi_wdata                  O   256
// m64_axi_wstrb                  O    32
// m64_axi_wlast                  O     1
// m64_axi_wuser                  O     1
// m64_axi_bready                 O     1 reg
// m32_axi_arvalid                O     1 reg
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// m32_axi_arid                   O     1
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// m32_axi_araddr                 O    64
// m32_axi_arlen                  O     8
// m32_axi_arsize                 O     3
// m32_axi_arburst                O     2
// m32_axi_arlock                 O     1
// m32_axi_arcache                O     4
// m32_axi_arprot                 O     3
// m32_axi_arqos                  O     4
// m32_axi_arregion               O     4
// m32_axi_aruser                 O     1
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// m32_axi_rready                 O     1 reg
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// m32_axi_awvalid                O     1 reg
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// m32_axi_awid                   O     1
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// m32_axi_awaddr                 O    64
// m32_axi_awlen                  O     8
// m32_axi_awsize                 O     3
// m32_axi_awburst                O     2
// m32_axi_awlock                 O     1
// m32_axi_awcache                O     4
// m32_axi_awprot                 O     3
// m32_axi_awqos                  O     4
// m32_axi_awregion               O     4
// m32_axi_awuser                 O     1
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// m32_axi_wvalid                 O     1 reg
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// m32_axi_wdata                  O   512
// m32_axi_wstrb                  O    64
// m32_axi_wlast                  O     1
// m32_axi_wuser                  O     1
// m32_axi_bready                 O     1 reg
// IRQ                            O     1 reg
// m32_axi_aclk                   I     1 clock
// m32_axi_aresetn                I     1 reset
// m64_axi_aclk                   I     1 clock
// m64_axi_aresetn                I     1 reset
// s_axi_aclk                     I     1 clock
// s_axi_aresetn                  I     1 reset
// S_AXI_arvalid                  I     1
// S_AXI_araddr                   I    64 reg
// S_AXI_arprot                   I     3 reg
// S_AXI_rready                   I     1
// S_AXI_awvalid                  I     1
// S_AXI_awaddr                   I    64
// S_AXI_awprot                   I     3
// S_AXI_wvalid                   I     1
// S_AXI_wdata                    I    64
// S_AXI_wstrb                    I     8
// S_AXI_bready                   I     1
// m64_axi_arready                I     1
// m64_axi_rvalid                 I     1
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// m64_axi_rid                    I     1 reg
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// m64_axi_rdata                  I   256 reg
// m64_axi_rresp                  I     2 reg
// m64_axi_rlast                  I     1 reg
// m64_axi_ruser                  I     1 reg
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// m64_axi_awready                I     1
// m64_axi_wready                 I     1
// m64_axi_bvalid                 I     1
// m64_axi_bresp                  I     2 reg
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// m64_axi_bid                    I     1 reg
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// m64_axi_buser                  I     1 reg
// m32_axi_arready                I     1
// m32_axi_rvalid                 I     1
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// m32_axi_rid                    I     1 reg
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// m32_axi_rdata                  I   512 reg
// m32_axi_rresp                  I     2 reg
// m32_axi_rlast                  I     1 reg
// m32_axi_ruser                  I     1 reg
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// m32_axi_awready                I     1
// m32_axi_wready                 I     1
// m32_axi_bvalid                 I     1
// m32_axi_bresp                  I     2 reg
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// m32_axi_bid                    I     1 reg
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// m32_axi_buser                  I     1 reg
//
// No combinational paths from inputs to outputs
//
//

`ifdef BSV_ASSIGNMENT_DELAY
`else
  `define BSV_ASSIGNMENT_DELAY
`endif

`ifdef BSV_POSITIVE_RESET
  `define BSV_RESET_VALUE 1'b1
  `define BSV_RESET_EDGE posedge
`else
  `define BSV_RESET_VALUE 1'b0
  `define BSV_RESET_EDGE negedge
`endif

module mkBlueDMAVivado(m32_axi_aclk,
		       m32_axi_aresetn,
		       m64_axi_aclk,
		       m64_axi_aresetn,
		       s_axi_aclk,
		       s_axi_aresetn,

		       S_AXI_arready,

		       S_AXI_arvalid,

		       S_AXI_araddr,

		       S_AXI_arprot,

		       S_AXI_rvalid,

		       S_AXI_rready,

		       S_AXI_rdata,

		       S_AXI_rresp,

		       S_AXI_awready,

		       S_AXI_awvalid,

		       S_AXI_awaddr,

		       S_AXI_awprot,

		       S_AXI_wready,

		       S_AXI_wvalid,

		       S_AXI_wdata,

		       S_AXI_wstrb,

		       S_AXI_bvalid,

		       S_AXI_bready,

		       S_AXI_bresp,

		       m64_axi_arvalid,

		       m64_axi_arready,

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		       m64_axi_arid,

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		       m64_axi_araddr,

		       m64_axi_arlen,

		       m64_axi_arsize,

		       m64_axi_arburst,

		       m64_axi_arlock,

		       m64_axi_arcache,

		       m64_axi_arprot,

		       m64_axi_arqos,

		       m64_axi_arregion,

		       m64_axi_aruser,

		       m64_axi_rready,

		       m64_axi_rvalid,

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		       m64_axi_rid,
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		       m64_axi_rdata,
		       m64_axi_rresp,
		       m64_axi_rlast,
		       m64_axi_ruser,

		       m64_axi_awready,

		       m64_axi_awvalid,

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		       m64_axi_awid,

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		       m64_axi_awaddr,

		       m64_axi_awlen,

		       m64_axi_awsize,

		       m64_axi_awburst,

		       m64_axi_awlock,

		       m64_axi_awcache,

		       m64_axi_awprot,

		       m64_axi_awqos,

		       m64_axi_awregion,

		       m64_axi_awuser,

		       m64_axi_wready,

		       m64_axi_wvalid,

		       m64_axi_wdata,

		       m64_axi_wstrb,

		       m64_axi_wlast,

		       m64_axi_wuser,

		       m64_axi_bvalid,

		       m64_axi_bready,

		       m64_axi_bresp,
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		       m64_axi_bid,
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		       m64_axi_buser,

		       m32_axi_arvalid,

		       m32_axi_arready,

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		       m32_axi_arid,

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		       m32_axi_araddr,

		       m32_axi_arlen,

		       m32_axi_arsize,

		       m32_axi_arburst,

		       m32_axi_arlock,

		       m32_axi_arcache,

		       m32_axi_arprot,

		       m32_axi_arqos,

		       m32_axi_arregion,

		       m32_axi_aruser,

		       m32_axi_rready,

		       m32_axi_rvalid,

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		       m32_axi_rid,
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		       m32_axi_rdata,
		       m32_axi_rresp,
		       m32_axi_rlast,
		       m32_axi_ruser,

		       m32_axi_awready,

		       m32_axi_awvalid,

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		       m32_axi_awid,

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		       m32_axi_awaddr,

		       m32_axi_awlen,

		       m32_axi_awsize,

		       m32_axi_awburst,

		       m32_axi_awlock,

		       m32_axi_awcache,

		       m32_axi_awprot,

		       m32_axi_awqos,

		       m32_axi_awregion,

		       m32_axi_awuser,

		       m32_axi_wready,

		       m32_axi_wvalid,

		       m32_axi_wdata,

		       m32_axi_wstrb,

		       m32_axi_wlast,

		       m32_axi_wuser,

		       m32_axi_bvalid,

		       m32_axi_bready,

		       m32_axi_bresp,
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		       m32_axi_bid,
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		       m32_axi_buser,

		       IRQ);
  input  m32_axi_aclk;
  input  m32_axi_aresetn;
  input  m64_axi_aclk;
  input  m64_axi_aresetn;
  input  s_axi_aclk;
  input  s_axi_aresetn;

  // value method s_rd_arready
  output S_AXI_arready;

  // action method s_rd_parvalid
  input  S_AXI_arvalid;

  // action method s_rd_paraddr
  input  [63 : 0] S_AXI_araddr;

  // action method s_rd_parprot
  input  [2 : 0] S_AXI_arprot;

  // value method s_rd_rvalid
  output S_AXI_rvalid;

  // action method s_rd_prready
  input  S_AXI_rready;

  // value method s_rd_rdata
  output [63 : 0] S_AXI_rdata;

  // value method s_rd_rresp
  output [1 : 0] S_AXI_rresp;

  // value method s_wr_awready
  output S_AXI_awready;

  // action method s_wr_pawvalid
  input  S_AXI_awvalid;

  // action method s_wr_pawaddr
  input  [63 : 0] S_AXI_awaddr;

  // action method s_wr_pawprot
  input  [2 : 0] S_AXI_awprot;

  // value method s_wr_wready
  output S_AXI_wready;

  // action method s_wr_pwvalid
  input  S_AXI_wvalid;

  // action method s_wr_pwdata
  input  [63 : 0] S_AXI_wdata;

  // action method s_wr_pwstrb
  input  [7 : 0] S_AXI_wstrb;

  // value method s_wr_bvalid
  output S_AXI_bvalid;

  // action method s_wr_pbready
  input  S_AXI_bready;

  // value method s_wr_bresp
  output [1 : 0] S_AXI_bresp;

  // value method pcie_rd_arvalid
  output m64_axi_arvalid;

  // action method pcie_rd_parready
  input  m64_axi_arready;

  // value method pcie_rd_arid
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  output m64_axi_arid;
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  // value method pcie_rd_araddr
  output [63 : 0] m64_axi_araddr;

  // value method pcie_rd_arlen
  output [7 : 0] m64_axi_arlen;

  // value method pcie_rd_arsize
  output [2 : 0] m64_axi_arsize;

  // value method pcie_rd_arburst
  output [1 : 0] m64_axi_arburst;

  // value method pcie_rd_arlock
  output m64_axi_arlock;

  // value method pcie_rd_arcache
  output [3 : 0] m64_axi_arcache;

  // value method pcie_rd_arprot
  output [2 : 0] m64_axi_arprot;

  // value method pcie_rd_arqos
  output [3 : 0] m64_axi_arqos;

  // value method pcie_rd_arregion
  output [3 : 0] m64_axi_arregion;

  // value method pcie_rd_aruser
  output m64_axi_aruser;

  // value method pcie_rd_rready
  output m64_axi_rready;

  // action method pcie_rd_prvalid
  input  m64_axi_rvalid;

  // action method pcie_rd_prchannel
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  input  m64_axi_rid;
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  input  [255 : 0] m64_axi_rdata;
  input  [1 : 0] m64_axi_rresp;
  input  m64_axi_rlast;
  input  m64_axi_ruser;

  // action method pcie_wr_pawready
  input  m64_axi_awready;

  // value method pcie_wr_awvalid
  output m64_axi_awvalid;

  // value method pcie_wr_awid
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  output m64_axi_awid;
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  // value method pcie_wr_awaddr
  output [63 : 0] m64_axi_awaddr;

  // value method pcie_wr_awlen
  output [7 : 0] m64_axi_awlen;

  // value method pcie_wr_awsize
  output [2 : 0] m64_axi_awsize;

  // value method pcie_wr_awburst
  output [1 : 0] m64_axi_awburst;

  // value method pcie_wr_awlock
  output m64_axi_awlock;

  // value method pcie_wr_awcache
  output [3 : 0] m64_axi_awcache;

  // value method pcie_wr_awprot
  output [2 : 0] m64_axi_awprot;

  // value method pcie_wr_awqos
  output [3 : 0] m64_axi_awqos;

  // value method pcie_wr_awregion
  output [3 : 0] m64_axi_awregion;

  // value method pcie_wr_awuser
  output m64_axi_awuser;

  // action method pcie_wr_pwready
  input  m64_axi_wready;

  // value method pcie_wr_wvalid
  output m64_axi_wvalid;

  // value method pcie_wr_wdata
  output [255 : 0] m64_axi_wdata;

  // value method pcie_wr_wstrb
  output [31 : 0] m64_axi_wstrb;

  // value method pcie_wr_wlast
  output m64_axi_wlast;

  // value method pcie_wr_wuser
  output m64_axi_wuser;

  // action method pcie_wr_pbvalid
  input  m64_axi_bvalid;

  // value method pcie_wr_bready
  output m64_axi_bready;

  // action method pcie_wr_bin
  input  [1 : 0] m64_axi_bresp;
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  input  m64_axi_bid;
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  input  m64_axi_buser;

  // value method fpga_rd_arvalid
  output m32_axi_arvalid;

  // action method fpga_rd_parready
  input  m32_axi_arready;

  // value method fpga_rd_arid
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  output m32_axi_arid;
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  // value method fpga_rd_araddr
  output [63 : 0] m32_axi_araddr;

  // value method fpga_rd_arlen
  output [7 : 0] m32_axi_arlen;

  // value method fpga_rd_arsize
  output [2 : 0] m32_axi_arsize;

  // value method fpga_rd_arburst
  output [1 : 0] m32_axi_arburst;

  // value method fpga_rd_arlock
  output m32_axi_arlock;

  // value method fpga_rd_arcache
  output [3 : 0] m32_axi_arcache;

  // value method fpga_rd_arprot
  output [2 : 0] m32_axi_arprot;

  // value method fpga_rd_arqos
  output [3 : 0] m32_axi_arqos;

  // value method fpga_rd_arregion
  output [3 : 0] m32_axi_arregion;

  // value method fpga_rd_aruser
  output m32_axi_aruser;

  // value method fpga_rd_rready
  output m32_axi_rready;

  // action method fpga_rd_prvalid
  input  m32_axi_rvalid;

  // action method fpga_rd_prchannel
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  input  m32_axi_rid;
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  input  [511 : 0] m32_axi_rdata;
  input  [1 : 0] m32_axi_rresp;
  input  m32_axi_rlast;
  input  m32_axi_ruser;

  // action method fpga_wr_pawready
  input  m32_axi_awready;

  // value method fpga_wr_awvalid
  output m32_axi_awvalid;

  // value method fpga_wr_awid
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  output m32_axi_awid;
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  // value method fpga_wr_awaddr
  output [63 : 0] m32_axi_awaddr;

  // value method fpga_wr_awlen
  output [7 : 0] m32_axi_awlen;

  // value method fpga_wr_awsize
  output [2 : 0] m32_axi_awsize;

  // value method fpga_wr_awburst
  output [1 : 0] m32_axi_awburst;

  // value method fpga_wr_awlock
  output m32_axi_awlock;

  // value method fpga_wr_awcache
  output [3 : 0] m32_axi_awcache;

  // value method fpga_wr_awprot
  output [2 : 0] m32_axi_awprot;

  // value method fpga_wr_awqos
  output [3 : 0] m32_axi_awqos;

  // value method fpga_wr_awregion
  output [3 : 0] m32_axi_awregion;

  // value method fpga_wr_awuser
  output m32_axi_awuser;

  // action method fpga_wr_pwready
  input  m32_axi_wready;

  // value method fpga_wr_wvalid
  output m32_axi_wvalid;

  // value method fpga_wr_wdata
  output [511 : 0] m32_axi_wdata;

  // value method fpga_wr_wstrb
  output [63 : 0] m32_axi_wstrb;

  // value method fpga_wr_wlast
  output m32_axi_wlast;

  // value method fpga_wr_wuser
  output m32_axi_wuser;

  // action method fpga_wr_pbvalid
  input  m32_axi_bvalid;

  // value method fpga_wr_bready
  output m32_axi_bready;

  // action method fpga_wr_bin
  input  [1 : 0] m32_axi_bresp;
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  input  m32_axi_bid;
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  input  m32_axi_buser;

  // value method interrupt
  output IRQ;

  // signals for module outputs
  reg [3 : 0] m32_axi_arcache,
	      m32_axi_awcache,
	      m64_axi_arcache,
	      m64_axi_awcache;
  wire [511 : 0] m32_axi_wdata;
  wire [255 : 0] m64_axi_wdata;
  wire [63 : 0] S_AXI_rdata,
		m32_axi_araddr,
		m32_axi_awaddr,
		m32_axi_wstrb,
		m64_axi_araddr,
		m64_axi_awaddr;
  wire [31 : 0] m64_axi_wstrb;
  wire [7 : 0] m32_axi_arlen, m32_axi_awlen, m64_axi_arlen, m64_axi_awlen;
  wire [3 : 0] m32_axi_arqos,
	       m32_axi_arregion,
	       m32_axi_awqos,
	       m32_axi_awregion,
	       m64_axi_arqos,
	       m64_axi_arregion,
	       m64_axi_awqos,
	       m64_axi_awregion;
  wire [2 : 0] m32_axi_arprot,
	       m32_axi_arsize,
	       m32_axi_awprot,
	       m32_axi_awsize,
	       m64_axi_arprot,
	       m64_axi_arsize,
	       m64_axi_awprot,
	       m64_axi_awsize;
  wire [1 : 0] S_AXI_bresp,
	       S_AXI_rresp,
	       m32_axi_arburst,
	       m32_axi_awburst,
	       m64_axi_arburst,
	       m64_axi_awburst;
  wire IRQ,
       S_AXI_arready,
       S_AXI_awready,
       S_AXI_bvalid,
       S_AXI_rvalid,
       S_AXI_wready,
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       m32_axi_arid,
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       m32_axi_arlock,
       m32_axi_aruser,
       m32_axi_arvalid,
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       m32_axi_awid,
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       m32_axi_awlock,
       m32_axi_awuser,
       m32_axi_awvalid,
       m32_axi_bready,
       m32_axi_rready,
       m32_axi_wlast,
       m32_axi_wuser,
       m32_axi_wvalid,
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       m64_axi_arid,
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       m64_axi_arlock,
       m64_axi_aruser,
       m64_axi_arvalid,
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       m64_axi_awid,
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       m64_axi_awlock,
       m64_axi_awuser,
       m64_axi_awvalid,
       m64_axi_bready,
       m64_axi_rready,
       m64_axi_wlast,
       m64_axi_wuser,
       m64_axi_wvalid;

  // ports of submodule blueDMA
  wire [511 : 0] blueDMA$fpga_rd_rdata, blueDMA$fpga_wr_wdata;
  wire [255 : 0] blueDMA$pcie_rd_rdata, blueDMA$pcie_wr_wdata;
  wire [63 : 0] blueDMA$S_AXI_araddr,
		blueDMA$S_AXI_awaddr,
		blueDMA$S_AXI_rdata,
		blueDMA$S_AXI_wdata,
		blueDMA$fpga_rd_araddr,
		blueDMA$fpga_wr_awaddr,
		blueDMA$fpga_wr_wstrb,
		blueDMA$pcie_rd_araddr,
		blueDMA$pcie_wr_awaddr;
  wire [31 : 0] blueDMA$pcie_wr_wstrb;
  wire [7 : 0] blueDMA$S_AXI_wstrb,
	       blueDMA$fpga_rd_arlen,
	       blueDMA$fpga_wr_awlen,
	       blueDMA$pcie_rd_arlen,
	       blueDMA$pcie_wr_awlen;
  wire [3 : 0] blueDMA$fpga_rd_arcache,
	       blueDMA$fpga_rd_arqos,
	       blueDMA$fpga_rd_arregion,
	       blueDMA$fpga_wr_awcache,
	       blueDMA$fpga_wr_awqos,
	       blueDMA$fpga_wr_awregion,
	       blueDMA$pcie_rd_arcache,
	       blueDMA$pcie_rd_arqos,
	       blueDMA$pcie_rd_arregion,
	       blueDMA$pcie_wr_awcache,
	       blueDMA$pcie_wr_awqos,
	       blueDMA$pcie_wr_awregion;
  wire [2 : 0] blueDMA$S_AXI_arprot,
	       blueDMA$S_AXI_awprot,
	       blueDMA$fpga_rd_arprot,
	       blueDMA$fpga_rd_arsize,
	       blueDMA$fpga_wr_awprot,
	       blueDMA$fpga_wr_awsize,
	       blueDMA$pcie_rd_arprot,
	       blueDMA$pcie_rd_arsize,
	       blueDMA$pcie_wr_awprot,
	       blueDMA$pcie_wr_awsize;
  wire [1 : 0] blueDMA$S_AXI_bresp,
	       blueDMA$S_AXI_rresp,
	       blueDMA$fpga_rd_arburst,
	       blueDMA$fpga_rd_rresp,
	       blueDMA$fpga_wr_awburst,
	       blueDMA$fpga_wr_bresp,
	       blueDMA$pcie_rd_arburst,
	       blueDMA$pcie_rd_rresp,
	       blueDMA$pcie_wr_awburst,
	       blueDMA$pcie_wr_bresp;
  wire blueDMA$S_AXI_arready,
       blueDMA$S_AXI_arvalid,
       blueDMA$S_AXI_awready,
       blueDMA$S_AXI_awvalid,
       blueDMA$S_AXI_bready,
       blueDMA$S_AXI_bvalid,
       blueDMA$S_AXI_rready,
       blueDMA$S_AXI_rvalid,
       blueDMA$S_AXI_wready,
       blueDMA$S_AXI_wvalid,
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       blueDMA$fpga_rd_arid,
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       blueDMA$fpga_rd_arlock,
       blueDMA$fpga_rd_arready,
       blueDMA$fpga_rd_aruser,
       blueDMA$fpga_rd_arvalid,
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       blueDMA$fpga_rd_rid,
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       blueDMA$fpga_rd_rlast,
       blueDMA$fpga_rd_rready,
       blueDMA$fpga_rd_ruser,
       blueDMA$fpga_rd_rvalid,
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       blueDMA$fpga_wr_awid,
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       blueDMA$fpga_wr_awlock,
       blueDMA$fpga_wr_awready,
       blueDMA$fpga_wr_awuser,
       blueDMA$fpga_wr_awvalid,
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       blueDMA$fpga_wr_bid,
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       blueDMA$fpga_wr_bready,
       blueDMA$fpga_wr_buser,
       blueDMA$fpga_wr_bvalid,
       blueDMA$fpga_wr_wlast,
       blueDMA$fpga_wr_wready,
       blueDMA$fpga_wr_wuser,
       blueDMA$fpga_wr_wvalid,
       blueDMA$interrupt,
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       blueDMA$pcie_rd_arid,
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       blueDMA$pcie_rd_arlock,
       blueDMA$pcie_rd_arready,
       blueDMA$pcie_rd_aruser,
       blueDMA$pcie_rd_arvalid,
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       blueDMA$pcie_rd_rid,
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       blueDMA$pcie_rd_rlast,
       blueDMA$pcie_rd_rready,
       blueDMA$pcie_rd_ruser,
       blueDMA$pcie_rd_rvalid,
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       blueDMA$pcie_wr_awid,
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       blueDMA$pcie_wr_awlock,
       blueDMA$pcie_wr_awready,
       blueDMA$pcie_wr_awuser,
       blueDMA$pcie_wr_awvalid,
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       blueDMA$pcie_wr_bid,
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       blueDMA$pcie_wr_bready,
       blueDMA$pcie_wr_buser,
       blueDMA$pcie_wr_bvalid,
       blueDMA$pcie_wr_wlast,
       blueDMA$pcie_wr_wready,
       blueDMA$pcie_wr_wuser,
       blueDMA$pcie_wr_wvalid;

  // value method s_rd_arready
  assign S_AXI_arready = blueDMA$S_AXI_arready ;

  // value method s_rd_rvalid
  assign S_AXI_rvalid = blueDMA$S_AXI_rvalid ;

  // value method s_rd_rdata
  assign S_AXI_rdata = blueDMA$S_AXI_rdata ;

  // value method s_rd_rresp
  assign S_AXI_rresp = blueDMA$S_AXI_rresp ;

  // value method s_wr_awready
  assign S_AXI_awready = blueDMA$S_AXI_awready ;

  // value method s_wr_wready
  assign S_AXI_wready = blueDMA$S_AXI_wready ;

  // value method s_wr_bvalid
  assign S_AXI_bvalid = blueDMA$S_AXI_bvalid ;

  // value method s_wr_bresp
  assign S_AXI_bresp = blueDMA$S_AXI_bresp ;

  // value method pcie_rd_arvalid
  assign m64_axi_arvalid = blueDMA$pcie_rd_arvalid ;

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  // value method pcie_rd_arid
  assign m64_axi_arid = blueDMA$pcie_rd_arid ;

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  // value method pcie_rd_araddr
  assign m64_axi_araddr = blueDMA$pcie_rd_araddr ;

  // value method pcie_rd_arlen
  assign m64_axi_arlen = blueDMA$pcie_rd_arlen ;

  // value method pcie_rd_arsize
  assign m64_axi_arsize = blueDMA$pcie_rd_arsize ;

  // value method pcie_rd_arburst
  assign m64_axi_arburst = blueDMA$pcie_rd_arburst ;

  // value method pcie_rd_arlock
  assign m64_axi_arlock = blueDMA$pcie_rd_arlock ;

  // value method pcie_rd_arcache
  always@(blueDMA$pcie_rd_arcache)
  begin
    case (blueDMA$pcie_rd_arcache)
      4'd0, 4'd1, 4'd2, 4'd3, 4'd10, 4'd14, 4'd15:
	  m64_axi_arcache = blueDMA$pcie_rd_arcache;
      default: m64_axi_arcache = 4'd11;
    endcase
  end

  // value method pcie_rd_arprot
  assign m64_axi_arprot = blueDMA$pcie_rd_arprot ;

  // value method pcie_rd_arqos
  assign m64_axi_arqos = blueDMA$pcie_rd_arqos ;

  // value method pcie_rd_arregion
  assign m64_axi_arregion = blueDMA$pcie_rd_arregion ;

  // value method pcie_rd_aruser
  assign m64_axi_aruser = blueDMA$pcie_rd_aruser ;

  // value method pcie_rd_rready
  assign m64_axi_rready = blueDMA$pcie_rd_rready ;

  // value method pcie_wr_awvalid
  assign m64_axi_awvalid = blueDMA$pcie_wr_awvalid ;

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  // value method pcie_wr_awid
  assign m64_axi_awid = blueDMA$pcie_wr_awid ;

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  // value method pcie_wr_awaddr
  assign m64_axi_awaddr = blueDMA$pcie_wr_awaddr ;

  // value method pcie_wr_awlen
  assign m64_axi_awlen = blueDMA$pcie_wr_awlen ;

  // value method pcie_wr_awsize
  assign m64_axi_awsize = blueDMA$pcie_wr_awsize ;

  // value method pcie_wr_awburst
  assign m64_axi_awburst = blueDMA$pcie_wr_awburst ;

  // value method pcie_wr_awlock
  assign m64_axi_awlock = blueDMA$pcie_wr_awlock ;

  // value method pcie_wr_awcache
  always@(blueDMA$pcie_wr_awcache)
  begin
    case (blueDMA$pcie_wr_awcache)
      4'd0, 4'd1, 4'd2, 4'd3, 4'd6, 4'd7, 4'd14:
	  m64_axi_awcache = blueDMA$pcie_wr_awcache;
      default: m64_axi_awcache = 4'd15;
    endcase
  end

  // value method pcie_wr_awprot
  assign m64_axi_awprot = blueDMA$pcie_wr_awprot ;

  // value method pcie_wr_awqos
  assign m64_axi_awqos = blueDMA$pcie_wr_awqos ;

  // value method pcie_wr_awregion
  assign m64_axi_awregion = blueDMA$pcie_wr_awregion ;

  // value method pcie_wr_awuser
  assign m64_axi_awuser = blueDMA$pcie_wr_awuser ;

  // value method pcie_wr_wvalid
  assign m64_axi_wvalid = blueDMA$pcie_wr_wvalid ;

  // value method pcie_wr_wdata
  assign m64_axi_wdata = blueDMA$pcie_wr_wdata ;

  // value method pcie_wr_wstrb
  assign m64_axi_wstrb = blueDMA$pcie_wr_wstrb ;

  // value method pcie_wr_wlast
  assign m64_axi_wlast = blueDMA$pcie_wr_wlast ;

  // value method pcie_wr_wuser
  assign m64_axi_wuser = blueDMA$pcie_wr_wuser ;

  // value method pcie_wr_bready
  assign m64_axi_bready = blueDMA$pcie_wr_bready ;

  // value method fpga_rd_arvalid
  assign m32_axi_arvalid = blueDMA$fpga_rd_arvalid ;

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  // value method fpga_rd_arid
  assign m32_axi_arid = blueDMA$fpga_rd_arid ;

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  // value method fpga_rd_araddr
  assign m32_axi_araddr = blueDMA$fpga_rd_araddr ;

  // value method fpga_rd_arlen
  assign m32_axi_arlen = blueDMA$fpga_rd_arlen ;

  // value method fpga_rd_arsize
  assign m32_axi_arsize = blueDMA$fpga_rd_arsize ;

  // value method fpga_rd_arburst
  assign m32_axi_arburst = blueDMA$fpga_rd_arburst ;

  // value method fpga_rd_arlock
  assign m32_axi_arlock = blueDMA$fpga_rd_arlock ;

  // value method fpga_rd_arcache
  always@(blueDMA$fpga_rd_arcache)
  begin
    case (blueDMA$fpga_rd_arcache)
      4'd0, 4'd1, 4'd2, 4'd3, 4'd10, 4'd14, 4'd15:
	  m32_axi_arcache = blueDMA$fpga_rd_arcache;
      default: m32_axi_arcache = 4'd11;
    endcase
  end

  // value method fpga_rd_arprot
  assign m32_axi_arprot = blueDMA$fpga_rd_arprot ;