AxiModuleBuilder.scala 4.93 KB
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package chisel.axiutils
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import  chisel.axiutils.axi4lite._, chisel.axiutils.axi4._
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import  chisel.packaging._, chisel.packaging.CoreDefinition.root
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import  chisel.miscutils.DecoupledDataSource, chisel.miscutils.Logging
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import  scala.sys.process._
import  java.nio.file.Paths
import  chisel3._
import  chisel.axi._
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import  chisel.axi.Axi4._
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class FifoAxiAdapterTest1(dataWidth: Int, size: Int) extends Module {
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  val addrWidth = 32
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  implicit val logLevel = Logging.Level.Info
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  implicit val axi = Axi4.Configuration(AddrWidth(addrWidth),
                                        DataWidth(dataWidth),
                                        IdWidth(1))
  val io = IO(new Bundle {
    val maxi = Axi4.Master(axi)
    val base = Input(UInt(AddrWidth(addrWidth)))
  })
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  val datasrc = Module(new DecoupledDataSource(dataWidth.U, size = 256, n => n.U, false))
  val fad = Module(new FifoAxiAdapter(fifoDepth = size,
                                      burstSize = Some(16)))
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  //io.maxi.renameSignals(None, None)
  io.base.suggestName("base")
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  fad.io.base := io.base
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  fad.io.enq  <> datasrc.io.out
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  fad.io.maxi <> io.maxi
}

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object AxiModuleBuilder extends ModuleBuilder {
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  implicit val logLevel = Logging.Level.Info
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  implicit val axi = Axi4.Configuration(AddrWidth(32),
                                        DataWidth(64),
                                        IdWidth(1))
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  implicit val axilite = Axi4Lite.Configuration(AddrWidth(32),
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                                                Axi4Lite.Width32)
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  val exampleRegisterFile = new axi4lite.RegisterFile.Configuration(addrGranularity = 8, regs = Map(
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    0  -> new ConstantRegister(value = BigInt("10101010", 16)),
    4  -> new ConstantRegister(value = BigInt("20202020", 16)),
    8  -> new ConstantRegister(value = BigInt("30303030", 16)),
    16 -> new ConstantRegister(value = BigInt("40404040", 16), bitfield = Map(
      "Byte #3" -> BitRange(31, 24),
      "Byte #2" -> BitRange(23, 16),
      "Byte #1" -> BitRange(15, 8),
      "Byte #0" -> BitRange(7, 0)
    ))
  ))(Axi4Lite.Configuration(AddrWidth(32), Axi4Lite.Width32))
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  val modules: Seq[ModuleDef] = Seq(
      ModuleDef( // test module with fixed data
        None,
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        () => new FifoAxiAdapterTest1(dataWidth = 32, 256),
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        CoreDefinition(
          name = "FifoAxiAdapterTest1",
          vendor = "esa.cs.tu-darmstadt.de",
          library = "chisel",
          version = "0.1",
          root = Paths.get(".").toAbsolutePath.resolve("ip").resolve("FifoAxiAdapterTest1").toString
        )
      ),
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      ModuleDef( // generic adapter module FIFO -> AXI
        None,
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        () => new FifoAxiAdapter(fifoDepth = 8),
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        CoreDefinition(
          name = "FifoAxiAdapter",
          vendor = "esa.cs.tu-darmstadt.de",
          library = "chisel",
          version = "0.1",
          root = Paths.get(".").toAbsolutePath.resolve("ip").resolve("FifoAxiAdapter").toString
        )
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      ),
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      ModuleDef( // generic adapter module AXI -> FIFO
        None,
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        () => AxiFifoAdapter(fifoDepth = 4)
                            (Axi4.Configuration(addrWidth = AddrWidth(32),
                                                dataWidth = DataWidth(32),
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                                                idWidth   = IdWidth(1)),
                             logLevel),
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        CoreDefinition(
          name = "AxiFifoAdapter",
          vendor = "esa.cs.tu-darmstadt.de",
          library = "chisel",
          version = "0.1",
          root = Paths.get(".").toAbsolutePath.resolve("ip").resolve("AxiFifoAdapter").toString
        )
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      ),
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      ModuleDef( // AXI-based sliding window
        None,
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        () => {
          implicit val axi = Axi4.Configuration(AddrWidth(32), DataWidth(64), IdWidth(1))
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          new SlidingWindow(SlidingWindow.Configuration(
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            gen = UInt(8.W),
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            width = 8,
            depth = 3,
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            afa = AxiFifoAdapter.Configuration(fifoDepth = 32, burstSize = Some(16))
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          ))
        },
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        CoreDefinition(
          name = "AxiSlidingWindow3x8",
          vendor = "esa.cs.tu-darmstadt.de",
          library = "chisel",
          version = "0.1",
          root = root("AxiSlidingWindow")
        )
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      ),
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      ModuleDef( // AXI Crossbar
        None,
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        () => new AxiMux(8),
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        CoreDefinition(
          name = "AxiMux",
          vendor = "esa.cs.tu-darmstadt.de",
          library = "chisel",
          version = "0.1",
          root = root("AxiMux")
        )
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      ),
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      ModuleDef( // AXI Register File
        Some(exampleRegisterFile),
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        () => new RegisterFile(exampleRegisterFile),
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        CoreDefinition.withActions(
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          name = "RegisterFile",
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          vendor = "esa.cs.tu-darmstadt.de",
          library = "chisel",
          version = "0.1",
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          root = root("RegisterFile"),
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          postBuildActions = Seq(_ match {
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            case Some(cfg: RegisterFile.Configuration) => cfg.dumpAddressMap(root("RegisterFile"))
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            case _ => ()
          })
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        )
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      )
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    )
}