ig_compile_simlib.tex 698 Bytes
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\section{Compile Xilinx IP Catalog for ModelSim}\label{sec:compile_simlib}%
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Vivado Design Suite contains the Xilinx IP catalog with many useful predefined IP cores, some of which are used by \tapasco{}.
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In order to simulate such IP with ModelSim \cite{modelsim} and to speed up the simulation, the entire IP catalog should be precompiled for ModelSim once.
Please refer to Xilinx UG900 "Logic Simulation" \cite{ug900-2014.3}, Chapter 8, p. 134ff for instructions on how to compile the Xilinx IP catalog for ModelSim.
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Place the compiled library in a location reachable from the system where \tapasco{} is to be executed, and point the environment variable \emph{COMPILED\_SIMLIB} to this location.
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