commit d3245516
Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
Date:   Thu Jan 25 10:19:19 2018 +0100

    Closes #149 - Zedboard Synthesis fails for 2017.3 and 2017.4

    * improved sys clock detection by checking available interfaces via
      get_board_part_interfaces, instead of trying sys_diff_clock first
    * also removed second warning when get_bd_pins returns nothing
    * removed old, unused platform code

commit 9a0fb9b0
Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
Date:   Thu Jan 25 10:18:03 2018 +0100

    Use Arty-Z7-20 board file from Digilent for PyNQ

    * contains the manually set top.xdc directives
    * identical to Pynq, except for peripheral components

commit f6a25afc
Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
Date:   Thu Jan 25 10:16:28 2018 +0100

    Update board definition for zedboard

    * Digilent has newer def of ZedBoard, using that automatically now
    * imported via MYVIVADO / XILINX_PATH env vars

commit a29aa6cc
Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
Date:   Thu Jan 25 10:14:39 2018 +0100

    Fix minor bug in PS7 instantiation routine

commit c782eadc
Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
Date:   Thu Jan 25 10:13:58 2018 +0100

    Remove 2016.4 specific code from design.master.tcl.template