Start to draft the IP core
* started with external format (JSON) * noticed a problem: without Verilog module parameters Features cannot easily add capabilities etc. * postponing the project until later
.gitignore
0 → 100644
build.sbt
0 → 100644
src/main/scala/json.scala
0 → 100644
src/main/scala/package.scala
0 → 100644