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tapasco
tapasco
Commits
18e67096
Commit
18e67096
authored
Nov 01, 2018
by
Jaco Hofmann
Browse files
Use sane defaults for missing address maps
parent
da0b7e83
Pipeline
#673
passed with stage
in 11 minutes and 7 seconds
Changes
2
Pipelines
1
Hide whitespace changes
Inline
Side-by-side
platform/common/addressmap.tcl
View file @
18e67096
...
...
@@ -157,17 +157,17 @@ namespace eval addressmap {
puts
" neither
$intf
nor
$sintf
were found in address map for
$seg:
$::error
Info"
puts
" assuming internal connection, setting values as found in segment:"
set range
[
get_property RANGE $seg
]
puts
" range:
$range
"
if
{
$range
eq
""
}
{
puts
" found no range on segment
$seg
, s
kipping
"
puts
" found no range on segment
$seg
, s
etting to max
"
report_property $seg
continue
set range
[
expr
"1 << 64"
]
}
puts
" range:
$range
"
set offset
[
get_property OFFSET $seg
]
if
{
$offset
eq
""
}
{
puts
" found no offset on segment
$seg
, s
kipping
"
puts
" found no offset on segment
$seg
, s
etting to zero
"
report_property $seg
continue
set offset 0
}
puts
" offset:
$offset
"
set me
[
dict create
"range"
$range
"offset"
$offset
"space"
$space seg
"
$seg
"
]
...
...
platform/pcie/pcie_base.tcl
View file @
18e67096
...
...
@@ -313,6 +313,8 @@
connect_bd_intf_net
[
get_bd_intf_pins -regexp $pcie/M_AXI
(
_B
)
?
]
\
[
get_bd_intf_pins -of_objects $bridge -filter
"VLNV ==
[
tapasco::ip::get_vlnv aximm_intf
]
&& MODE == Slave"
]
#assign_bd_address
[
get_bd_addr_segs
{
$bridge
/S_AXI/reg0
}]
set out_ic
[
tapasco::ip::create_axi_sc
"out_ic"
1 4
]
tapasco::ip::connect_sc_default_clocks $out_ic
"host"
connect_bd_intf_net
[
get_bd_intf_pins -of_objects $bridge -filter
"VLNV ==
[
tapasco::ip::get_vlnv aximm_intf
]
&& MODE == Master"
]
\
...
...
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