Merge pull request #325 from esa-tu-darmstadt/feature/bittware-non-es

Split Bittware XUP-VVH into ES and standard version

.gitlab-ci.yml

@@ -538,6 +538,11 @@ tapasco_compose_xupvvh:
     PLATFORM: "xupvvh"
   extends: .tapasco_compose_no_synth
 
+tapasco_compose_xupvvh-es:
+  variables:
+    PLATFORM: "xupvvh-es"
+  extends: .tapasco_compose_no_synth
+
 tapasco_compose_zc706:
   variables:
     PLATFORM: "zc706"

toolflow/vivado/platform/xupvvh-es/platform.json

+{
+	"Name" : "xupvvh-es",
+	"Description" : "Xilinx UltraScale+ 3/4-Length PCIe Board by Bittware",
+	"TclLibrary" : "xupvvh.tcl",
+	"Part" : "xcvu37p-fsvh2892-2-e-es1",
+	"TargetUtilization" : 90,
+	"Benchmark" : "xupvvh.benchmark",
+	"HostFrequency": 250.0,
+	"MemFrequency": 300.0
+}

toolflow/vivado/platform/xupvvh-es/xupvvh.tcl

+../xupvvh/xupvvh.tcl
\ No newline at end of file

toolflow/vivado/platform/xupvvh/platform.json

@@ -2,7 +2,7 @@
 	"Name" : "xupvvh",
 	"Description" : "Xilinx UltraScale+ 3/4-Length PCIe Board by Bittware",
 	"TclLibrary" : "xupvvh.tcl",
-	"Part" : "xcvu37p-fsvh2892-2-e-es1",
+	"Part" : "xcvu37p-fsvh2892-2-e",
 	"TargetUtilization" : 90,
 	"Benchmark" : "xupvvh.benchmark",
 	"HostFrequency": 250.0,