Unverified Commit 549d58aa authored by Johannes Wirth's avatar Johannes Wirth Committed by GitHub
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Merge pull request #318 from esa-tu-darmstadt/feature/ipec

enable PEs with multiple reg/mem slave interfaces
parents 64d0fc0b e8e3c677
Pipeline #2553 passed with stages
in 214 minutes and 12 seconds
...@@ -360,6 +360,7 @@ namespace eval arch { ...@@ -360,6 +360,7 @@ namespace eval arch {
set intr_name "PE_${i}_${pe_sub_interrupt}" set intr_name "PE_${i}_${pe_sub_interrupt}"
puts "Creating interrupt $intr_name" puts "Creating interrupt $intr_name"
connect_bd_net $pin [::tapasco::ip::add_interrupt $intr_name "design"] connect_bd_net $pin [::tapasco::ip::add_interrupt $intr_name "design"]
incr pe_sub_interrupt
} }
incr i incr i
} }
......
...@@ -35,40 +35,68 @@ namespace eval arch { ...@@ -35,40 +35,68 @@ namespace eval arch {
set pes [lsort [get_processing_elements]] set pes [lsort [get_processing_elements]]
foreach pe $pes { foreach pe $pes {
puts " processing $pe registers ..." set reg_segs [lsort [get_bd_addr_segs -filter { USAGE == register } $pe/*]]
set usrs [lsort [get_bd_addr_segs -filter { USAGE == register } $pe/*]] set mem_segs [lsort [get_bd_addr_segs -filter { USAGE == memory } $pe/*]]
for {set i 0} {$i < [llength $usrs]} {incr i} { if {[llength $reg_segs] <= 1 && [llength $mem_segs] <= 1} {
set seg [lindex $usrs $i] puts " processing $pe registers ..."
puts " seg: $seg" for {set i 0} {$i < [llength $reg_segs]} {incr i} {
if {[get_property MODE [get_bd_intf_pins -of_objects $seg]] == "Master"} { set seg [lindex $reg_segs $i]
puts " skipping master seg $seg" puts " seg: $seg"
} else { if {[get_property MODE [get_bd_intf_pins -of_objects $seg]] == "Master"} {
set intf [get_bd_intf_pins -of_objects $seg] puts " skipping master seg $seg"
set range [get_property RANGE $seg] } else {
set offset [next_valid_address $offset $range] set intf [get_bd_intf_pins -of_objects $seg]
::platform::addressmap::add_processing_element [llength [dict keys $ret]] $offset $range set range [get_property RANGE $seg]
dict set ret $intf "interface $intf [format "offset 0x%08x range 0x%08x" $offset $range] kind register" set offset [next_valid_address $offset $range]
incr offset $range ::platform::addressmap::add_processing_element [llength [dict keys $ret]] $offset $range
dict set ret $intf "interface $intf [format "offset 0x%08x range 0x%08x" $offset $range] kind register"
incr offset $range
}
} }
} puts " processing $pe memories ..."
puts " processing $pe memories ..." for {set i 0} {$i < [llength $mem_segs]} {incr i} {
set usrs [lsort [get_bd_addr_segs -filter { USAGE == memory } $pe/*]] set seg [lindex $mem_segs $i]
for {set i 0} {$i < [llength $usrs]} {incr i} { puts " seg: $seg"
set seg [lindex $usrs $i] if {[get_property MODE [get_bd_intf_pins -of_objects $seg]] == "Master"} {
puts " seg: $seg" puts " skipping master seg $seg"
if {[get_property MODE [get_bd_intf_pins -of_objects $seg]] == "Master"} { } else {
puts " skipping master seg $seg" set intf [get_bd_intf_pins -of_objects $seg]
continue set range [get_property RANGE $seg]
} else { set offset [next_valid_address $offset $range]
set intf [get_bd_intf_pins -of_objects $seg] ::platform::addressmap::add_processing_element [llength [dict keys $ret]] $offset $range
set range [get_property RANGE $seg] dict set ret $intf "interface $intf [format "offset 0x%08x range 0x%08x" $offset $range] kind memory"
set offset [next_valid_address $offset $range] incr offset $range
::platform::addressmap::add_processing_element [llength [dict keys $ret]] $offset $range }
dict set ret $intf "interface $intf [format "offset 0x%08x range 0x%08x" $offset $range] kind memory" }
incr offset $range } else {
# If there is more than one reg/mem interface, we add them in the same order as declared in the IP-XACT core.
# The current runtime uses the order to detect control-register-interface & memory-interface pairs.
# When a PE has multiple such interfaces, ordering them regs first, mems second leads to the runtime recognizing only one reg-memory pair.
# When using the same ordering as the IP-XACT core, the user can define which memory-interface belongs to a certain control-register-interface by ordering them accordingly.
puts " processing $pe registers and memories ..."
set all_segs [lsort [get_bd_addr_segs $pe/*]]
for {set i 0} {$i < [llength $all_segs]} {incr i} {
set seg [lindex $all_segs $i]
puts " seg: $seg"
if {[get_property MODE [get_bd_intf_pins -of_objects $seg]] == "Master"} {
puts " skipping master seg $seg"
} else {
set intf [get_bd_intf_pins -of_objects $seg]
set range [get_property RANGE $seg]
set usage [get_property USAGE $seg]
set offset [next_valid_address $offset $range]
::platform::addressmap::add_processing_element [llength [dict keys $ret]] $offset $range
if { $usage == "register" } {
dict set ret $intf "interface $intf [format "offset 0x%08x range 0x%08x" $offset $range] kind register"
} else {
dict set ret $intf "interface $intf [format "offset 0x%08x range 0x%08x" $offset $range] kind memory"
}
incr offset $range
}
} }
} }
} }
return $ret return $ret
} }
} }
...@@ -540,6 +540,12 @@ namespace eval ::tapasco::ip { ...@@ -540,6 +540,12 @@ namespace eval ::tapasco::ip {
set kid [dict get [::tapasco::get_composition] $kind id] set kid [dict get [::tapasco::get_composition] $kind id]
set vlnv [dict get [::tapasco::get_composition] $kind vlnv] set vlnv [dict get [::tapasco::get_composition] $kind vlnv]
set intfinfo [tapasco::call_plugins "status-core-interface" $vlnv $intf]
if { $intfinfo != {} } {
set kid [lindex $intfinfo 0]
set vlnv [lindex $intfinfo 1]
}
lappend slots [json::write object "Type" [json::write string "Kernel"] "SlotId" $slot_id "Kernel" $kid \ lappend slots [json::write object "Type" [json::write string "Kernel"] "SlotId" $slot_id "Kernel" $kid \
"Offset" [json::write string [format "0x%016x" [expr "[dict get $addr $intf "offset"] - [::platform::get_pe_base_address]"]]] \ "Offset" [json::write string [format "0x%016x" [expr "[dict get $addr $intf "offset"] - [::platform::get_pe_base_address]"]]] \
"Size" [json::write string [format "0x%016x" [dict get $addr $intf "range"]]] \ "Size" [json::write string [format "0x%016x" [dict get $addr $intf "range"]]] \
......
# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
#
# This file is part of TaPaSCo
# (see https://github.com/esa-tu-darmstadt/tapasco).
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU Lesser General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
namespace eval status_core_interface {
proc get_interface_info { vlnv intf } {
set intf_rename [tapasco::get_feature "IPEC"]
set intfname [lindex [split $intf /] end]
if {[dict exists $intf_rename $vlnv $intfname]} {
set kid [dict get $intf_rename $vlnv $intfname "kid"]
set kid [expr int($kid)]
set vlnv [dict get $intf_rename $vlnv $intfname "vlnv"]
puts " replaced vlnv $vlnv kid $kid"
return [list $kid $vlnv]
}
return {}
}
}
tapasco::register_plugin "platform::status_core_interface::get_interface_info" "status-core-interface"
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