Fix bug in VLNVs for Vivado 2016.2

common/common_2016.2.tcl

@@ -15,7 +15,7 @@ dict set stdcomps oled_ctrl vlnv "esa.cs.tu-darmstadt.de:user:oled_pc:1.0"
 dict set stdcomps mm_to_lite vlnv "esa.cs.tu-darmstadt.de:user:mm_to_lite:1.0"
 dict set stdcomps system_cache vlnv "xilinx.com:ip:system_cache:3.1"
 dict set stdcomps mig_core vlnv "xilinx.com:ip:mig_7series:4.0"
-dict set stdcomps axi_pcie3_0 vlnv "xilinx.com:ip:axi_pcie3:3.0"
+dict set stdcomps axi_pcie3_0 vlnv "xilinx.com:ip:axi_pcie3:2.1"
 dict set stdcomps tapasco_status vlnv "esa.cs.tu-darmstadt.de:user:tapasco_status:1.1"
 dict set stdcomps clk_wiz "xilinx.com:ip:clk_wiz:5.3"
 dict set stdcomps msix_intr_ctrl vlnv "esa.informatik.tu-darmstadt.de:user:MSIXIntrCtrl:1.0"

platform/vc709/plugins/blue-dma.tcl

+namespace eval blue_dma {
+  namespace export blue_dma
+  namespace export set_constraints
+
+  set vlnv "esa.informatik.tu-darmstadt.de:user:BlueDMA:1.0"
+
+  proc blue_dma {{args {}}} {
+    variable vlnv
+    if {[tapasco::is_platform_feature_enabled "BlueDMA"]} {
+      # blue_dma is drop-in replacement for dual_dma: replace original VLNV
+      dict set tapasco::stdcomps dualdma vlnv $vlnv
+    }
+  }
+
+  proc set_constraints {{args {}}} {
+    if {[tpc::is_platform_feature_enabled "BlueDMA"]} {
+      puts "Adding false path constraints for BlueDMA"
+      set constraints_fn "[get_property DIRECTORY [current_project]]/bluedma.xdc"
+      set constraints_file [open $constraints_fn w+]
+      puts $constraints_file {set s_clk [get_clocks -of_objects [get_ports m32_axi_aclk]]}
+      puts $constraints_file {set m_clk [get_clocks -of_objects [get_ports m64_axi_aclk]]}
+      puts $constraints_file {set g_clk [get_clocks -of_objects [get_ports s_axi_aclk]]}
+      puts $constraints_file {set_clock_groups -asynchronous -group $g_clk -group $s_clk}
+      puts $constraints_file {set_clock_groups -asynchronous -group $g_clk -group $m_clk}
+      puts $constraints_file {set_clock_groups -asynchronous -group $m_clk -group $s_clk}
+      close $constraints_file
+      read_xdc -cells {system_i/Memory/dual_dma} $constraints_fn
+    } 
+  }
+}
+
+tapasco::register_plugin "platform::blue_dma::blue_dma" "post-init"
+tapasco::register_plugin "platform::blue_dma::set_constraints" "post-synth"

platform/vc709/plugins/dual_dma.tcl → platform/vc709/plugins/dual-dma.tcl

@@ -23,7 +23,7 @@
 namespace eval dual_dma {
   namespace export set_constraints
 
-  proc set_constraints {} {
+  proc set_constraints {{args {}}} {
     puts "Setting constraints for dual_dma ..."
     read_xdc -cells {system_i/Memory/dual_dma} "$::env(TAPASCO_HOME)/common/ip/dual_dma_1.0/dual_async_m32_m64.xdc"
   }