Commit 6b037ef5 authored by Jens Korinth's avatar Jens Korinth
Browse files

Fix bug in VLNVs for Vivado 2016.2

parent f4678826
......@@ -15,7 +15,7 @@ dict set stdcomps oled_ctrl vlnv ""
dict set stdcomps mm_to_lite vlnv ""
dict set stdcomps system_cache vlnv ""
dict set stdcomps mig_core vlnv ""
dict set stdcomps axi_pcie3_0 vlnv ""
dict set stdcomps axi_pcie3_0 vlnv ""
dict set stdcomps tapasco_status vlnv ""
dict set stdcomps clk_wiz ""
dict set stdcomps msix_intr_ctrl vlnv ""
namespace eval blue_dma {
namespace export blue_dma
namespace export set_constraints
set vlnv ""
proc blue_dma {{args {}}} {
variable vlnv
if {[tapasco::is_platform_feature_enabled "BlueDMA"]} {
# blue_dma is drop-in replacement for dual_dma: replace original VLNV
dict set tapasco::stdcomps dualdma vlnv $vlnv
proc set_constraints {{args {}}} {
if {[tpc::is_platform_feature_enabled "BlueDMA"]} {
puts "Adding false path constraints for BlueDMA"
set constraints_fn "[get_property DIRECTORY [current_project]]/bluedma.xdc"
set constraints_file [open $constraints_fn w+]
puts $constraints_file {set s_clk [get_clocks -of_objects [get_ports m32_axi_aclk]]}
puts $constraints_file {set m_clk [get_clocks -of_objects [get_ports m64_axi_aclk]]}
puts $constraints_file {set g_clk [get_clocks -of_objects [get_ports s_axi_aclk]]}
puts $constraints_file {set_clock_groups -asynchronous -group $g_clk -group $s_clk}
puts $constraints_file {set_clock_groups -asynchronous -group $g_clk -group $m_clk}
puts $constraints_file {set_clock_groups -asynchronous -group $m_clk -group $s_clk}
close $constraints_file
read_xdc -cells {system_i/Memory/dual_dma} $constraints_fn
tapasco::register_plugin "platform::blue_dma::blue_dma" "post-init"
tapasco::register_plugin "platform::blue_dma::set_constraints" "post-synth"
......@@ -23,7 +23,7 @@
namespace eval dual_dma {
namespace export set_constraints
proc set_constraints {} {
proc set_constraints {{args {}}} {
puts "Setting constraints for dual_dma ..."
read_xdc -cells {system_i/Memory/dual_dma} "$::env(TAPASCO_HOME)/common/ip/dual_dma_1.0/dual_async_m32_m64.xdc"
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