Commit 79d6920e authored by Jens Korinth's avatar Jens Korinth
Browse files

DataWidthConverter: Fix full throughput

* new full speed test suite failed: output may not block
* fixed by adding new special case
* achieves full speed & correctness now
parent df4586fa
......@@ -45,7 +45,7 @@ class DataWidthConverter(
val i = Reg(UInt(width = log2Up(ratio + 1)))
val d = Reg(UInt(width = outWidth))
io.inq.ready := !reset && i =/= UInt(0)
io.inq.ready := !reset && (i =/= UInt(0) || (io.inq.valid && io.deq.ready))
io.deq.bits := d
io.deq.valid := !reset && i === UInt(0)
......@@ -62,7 +62,7 @@ class DataWidthConverter(
i := i - UInt(1)
}
when (io.deq.valid && io.deq.ready) {
i := UInt(ratio)
i := Mux(io.inq.valid, UInt(ratio - 1), UInt(ratio))
}
}
}
......
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