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tapasco
tapasco
Commits
9d650848
Commit
9d650848
authored
Dec 13, 2017
by
Jens Korinth
Browse files
Fix uninitialized wires in AxiFifoAdapter
parent
99699663
Changes
1
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src/main/scala/axi4/AxiFifoAdapter.scala
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9d650848
...
...
@@ -92,6 +92,10 @@ class AxiFifoAdapter(cfg: AxiFifoAdapter.Configuration)
fifo
.
io
.
enq
.
valid
:=
io
.
maxi
.
readData
.
valid
// AXI boilerplate
io
.
maxi
.
readAddr
.
bits
.
defaults
io
.
maxi
.
writeAddr
.
bits
.
defaults
io
.
maxi
.
writeData
.
bits
.
defaults
io
.
maxi
.
readAddr
.
bits
.
addr
:=
maxi_raddr
io
.
maxi
.
readAddr
.
bits
.
burst
.
size
:=
(
if
(
axi
.
dataWidth
>
8
)
log2Ceil
(
axi
.
dataWidth
/
8
)
else
0
).
U
io
.
maxi
.
readAddr
.
bits
.
burst
.
len
:=
(
bsz
-
1
).
U
...
...
Jens Korinth
@jk
mentioned in commit
17f0d672
·
Mar 05, 2018
mentioned in commit
17f0d672
mentioned in commit 17f0d67240ebf5d7e1d0be9162d272b04256c47d
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