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tapasco
tapasco
Commits
bf136442
Commit
bf136442
authored
Mar 23, 2022
by
David Volz
Browse files
addrmap & statuscore for PEs with many intf and ipec
parent
07379d4f
Pipeline
#2548
passed with stages
in 157 minutes and 32 seconds
Changes
2
Pipelines
1
Show whitespace changes
Inline
Side-by-side
toolflow/vivado/arch/common/arch.tcl
View file @
bf136442
...
...
@@ -35,10 +35,12 @@ namespace eval arch {
set pes
[
lsort
[
get_processing_elements
]]
foreach pe $pes
{
set reg_segs
[
lsort
[
get_bd_addr_segs -filter
{
USAGE == register
}
$pe/*
]]
set mem_segs
[
lsort
[
get_bd_addr_segs -filter
{
USAGE == memory
}
$pe/*
]]
if
{[
llength $reg_segs
]
<= 1 &&
[
llength $mem_segs
]
<= 1
}
{
puts
" processing
$pe
registers ..."
set usrs
[
lsort
[
get_bd_addr_segs -filter
{
USAGE == register
}
$pe/*
]]
for
{
set i 0
}
{
$i
<
[
llength $usrs
]}
{
incr i
}
{
set seg
[
lindex $usrs $i
]
for
{
set i 0
}
{
$i
<
[
llength $reg_segs
]}
{
incr i
}
{
set seg
[
lindex $reg_segs $i
]
puts
" seg:
$seg
"
if
{[
get_property MODE
[
get_bd_intf_pins -of_objects $seg
]]
==
"Master"
}
{
puts
" skipping master seg
$seg
"
...
...
@@ -52,13 +54,11 @@ namespace eval arch {
}
}
puts
" processing
$pe
memories ..."
set usrs
[
lsort
[
get_bd_addr_segs -filter
{
USAGE == memory
}
$pe/*
]]
for
{
set i 0
}
{
$i
<
[
llength $usrs
]}
{
incr i
}
{
set seg
[
lindex $usrs $i
]
for
{
set i 0
}
{
$i
<
[
llength $mem_segs
]}
{
incr i
}
{
set seg
[
lindex $mem_segs $i
]
puts
" seg:
$seg
"
if
{[
get_property MODE
[
get_bd_intf_pins -of_objects $seg
]]
==
"Master"
}
{
puts
" skipping master seg
$seg
"
continue
}
else
{
set intf
[
get_bd_intf_pins -of_objects $seg
]
set range
[
get_property RANGE $seg
]
...
...
@@ -68,7 +68,32 @@ namespace eval arch {
incr offset $range
}
}
}
else
{
# if there is more than one reg/mem interface, we assume that the user knows what they are doing and add them in the same order
puts
" processing
$pe
registers and memories ..."
set all_segs
[
lsort
[
get_bd_addr_segs $pe/*
]]
for
{
set i 0
}
{
$i
<
[
llength $all_segs
]}
{
incr i
}
{
set seg
[
lindex $all_segs $i
]
puts
" seg:
$seg
"
if
{[
get_property MODE
[
get_bd_intf_pins -of_objects $seg
]]
==
"Master"
}
{
puts
" skipping master seg
$seg
"
}
else
{
set intf
[
get_bd_intf_pins -of_objects $seg
]
set range
[
get_property RANGE $seg
]
set usage
[
get_property USAGE $seg
]
set offset
[
next_valid_address $offset $range
]
::platform::addressmap::add_processing_element
[
llength
[
dict keys $ret
]]
$offset $range
if
{
$usage ==
"register"
}
{
dict set ret $intf
"interface
$intf
[
format
"offset 0x%08x range 0x%08x"
$offset $range
]
kind register subintf
$i
"
}
else
{
dict set ret $intf
"interface
$intf
[
format
"offset 0x%08x range 0x%08x"
$offset $range
]
kind memory subintf
$i
"
}
incr offset $range
}
}
}
}
return $ret
}
}
toolflow/vivado/common/ip.tcl
View file @
bf136442
...
...
@@ -540,6 +540,16 @@ namespace eval ::tapasco::ip {
set kid
[
dict get
[
::tapasco::get_composition
]
$kind id
]
set vlnv
[
dict get
[
::tapasco::get_composition
]
$kind vlnv
]
if
{[
tapasco::is_feature_enabled
"IPEC"
]}
{
set feature
[
tapasco::get_feature
"IPEC"
]
if
{[
dict exists $feature $vlnv
]}
{
set subintf
[
dict get $addr $intf
"subintf"
]
set kid
[
lindex
[
dict get $feature $vlnv
"kid"
]
$subintf
]
set kid
[
expr int
(
$kid
)]
set vlnv
[
lindex
[
dict get $feature $vlnv
"vlnv"
]
$subintf
]
}
}
lappend slots
[
json::write object
"Type"
[
json::write string
"Kernel"
]
"SlotId"
$slot_id
"Kernel"
$kid
\
"Offset"
[
json::write string
[
format
"0x%016x"
[
expr
"
[
dict get $addr $intf
"offset"
]
-
[
::platform::get_pe_base_address
]
"
]]]
\
"Size"
[
json::write string
[
format
"0x%016x"
[
dict get $addr $intf
"range"
]]]
\
...
...
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