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tapasco
tapasco
Commits
ceb82b5c
Commit
ceb82b5c
authored
Oct 11, 2017
by
Jens Korinth
Browse files
SlidingWindow: Remove reset logic
parent
e3a6000c
Changes
1
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Inline
Side-by-side
src/main/scala/axi4/SlidingWindow.scala
View file @
ceb82b5c
...
...
@@ -70,7 +70,7 @@ class SlidingWindow[T <: Data](val cfg: SlidingWindow.Configuration[T])
val
cnt
=
Reg
(
UInt
(
log2Ceil
(
cfg
.
depth
).
W
))
// input readiness is wired through to data input
data_in
.
ready
:=
Mux
(
state
===
init
,
!
reset
,
io
.
data
.
ready
)
data_in
.
ready
:=
RegNext
(
state
===
init
|
io
.
data
.
ready
,
init
=
false
.
B
)
io
.
data
.
valid
:=
state
===
full
&&
data_in
.
valid
for
(
i
<-
0
until
cfg
.
depth
)
...
...
@@ -82,17 +82,15 @@ class SlidingWindow[T <: Data](val cfg: SlidingWindow.Configuration[T])
// connect AFA M-AXI to outside
io
.
maxi
<>
afa
.
io
.
maxi
when
(!
reset
)
{
// shift data on handshake
when
(
data_in
.
ready
&&
data_in
.
valid
)
{
mem
(
cfg
.
depth
-
1
)
:=
data_in
.
bits
for
(
i
<-
0
until
cfg
.
depth
-
1
)
mem
(
i
)
:=
mem
(
i
+
1
)
// shift data on handshake
when
(
data_in
.
ready
&&
data_in
.
valid
)
{
mem
(
cfg
.
depth
-
1
)
:=
data_in
.
bits
for
(
i
<-
0
until
cfg
.
depth
-
1
)
mem
(
i
)
:=
mem
(
i
+
1
)
when
(
state
===
init
)
{
cnt
:=
cnt
+
1.
U
when
(
cnt
===
(
cfg
.
depth
-
1
).
U
)
{
state
:=
full
}
}
when
(
state
===
init
)
{
cnt
:=
cnt
+
1.
U
when
(
cnt
===
(
cfg
.
depth
-
1
).
U
)
{
state
:=
full
}
}
}
}
Jens Korinth
@jk
mentioned in commit
17f0d672
·
Mar 05, 2018
mentioned in commit
17f0d672
mentioned in commit 17f0d67240ebf5d7e1d0be9162d272b04256c47d
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