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tapasco
tapasco
Commits
ddf7ab7f
Commit
ddf7ab7f
authored
Apr 25, 2022
by
David Volz
Browse files
only count SLAVE interfaces
parent
89859c85
Pipeline
#2557
passed with stages
in 219 minutes and 21 seconds
Changes
1
Pipelines
1
Hide whitespace changes
Inline
Side-by-side
toolflow/vivado/arch/common/arch.tcl
View file @
ddf7ab7f
...
...
@@ -39,8 +39,8 @@ namespace eval arch {
set mem_segs
[
lsort
[
get_bd_addr_segs -filter
{
USAGE == memory
}
$pe/*
]]
set reg_slaves 0
set mem_slaves 0
foreach seg $reg_segs
{
if
{[
get_property MODE
[
get_bd_intf_pins -of_objects $seg
]]
==
"
Master
"
}
{
incr reg_slaves
}
}
foreach seg $mem_segs
{
if
{[
get_property MODE
[
get_bd_intf_pins -of_objects $seg
]]
==
"
Master
"
}
{
incr mem_slaves
}
}
foreach seg $reg_segs
{
if
{[
get_property MODE
[
get_bd_intf_pins -of_objects $seg
]]
==
"
Slave
"
}
{
incr reg_slaves
}
}
foreach seg $mem_segs
{
if
{[
get_property MODE
[
get_bd_intf_pins -of_objects $seg
]]
==
"
Slave
"
}
{
incr mem_slaves
}
}
if
{[
llength $reg_slaves
]
<= 1 &&
[
llength $mem_slaves
]
<= 1
}
{
puts
" processing
$pe
registers ..."
for
{
set i 0
}
{
$i
<
[
llength $reg_segs
]}
{
incr i
}
{
...
...
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