* netlist-only IP cores lead to problems with the clock constraints
  regarding the bus interfaces: Vivado could no longer infer the clock
  for each AXI interface automatically, leading to broken cores
* removed netlist creation; deactivation of OOC builds in 2016.4+ fixes
  the core problem of synthesizing the same core dozens of times

* ZipUtils now has flatten option for unzip (set by default)
* if not set, will recreate directory structure in target dir

* alternatives are now checked and built, in case the alternatives
  dimension is activated in DSE

* slurm executables are highly unreliable, both sbatch and squeue often
  fail with socket errors and similar
* need a retry mechanism for sbatch, too
* will retry a number of times now, with 10secs in between, before failing

* synthesis can be accelerated by dumping an EDIF netlist during IP
  evaluation and only using the netlist in the IP-XACT core
* no need to re-synthesize IP, especially useful in case of many
  instances
* replaced old links to original zip files by new zip that contains only
  the component.xml and the netlist

* SLURM should ignore resource constraints
* tasks now start correctly in SLURM mode

* better control to restrict parallelism (~ memory consumption)
* global parameter --maxThreads [NUM] controls general.maxThreads in Vivado
* applies to both synthesis and implementation
* removed superfluous implicit in Composer

* stopped working due to rename of Vivado project

* Jobs are executed sequentially by default, but there are cases in
  which it is useful to execute them in parallel instead (especially in
  combination with SLURM)
* implemented global --parallel switch to activate this mode
* added to all representations (parser, Json, prettyPrint)

* just had a number of runs killed, because their memory usage exceeded
  8 GiB (Xilinx claims 6 GiB, but apparently for PnR only)
* moved to generous 10 GiB

* fixed; existence of cores is now checked as in Compose

* backport improved vc709.tcl
* support for MSI-X interrupts
* support for BlueDMA replacement for dual_dma
* Platform API: raw read/writes
* setup.sh automatically builds .jar
* Compose: dumps Configuration in output directory
* Compose: adds activated Features to last dir level
* new Feature ATS+PRI w/Tcl support
* new Feature BlueDMA w/Tcl support
* some bugfixes regarding Features

* backported device capability interface
* extended status core with new registers:
  + Vivado version
  + Tapasco version
  + Timestamp (UNIX)
  + Clocks (host, mem, design)
* added new common methods to query the frequencies and globals to set
* used as default by create_subsystem_clocks_and_resets
* extended Platform to contain optional frequencies
* implemented unit tests for each new property
* if set, they are written to Tcl in VivadoComposer

* added Json serdes
* fixed unit test cases

* removed; not required anymore
* standard name for Vivado project is now microarch

* baseline sounds suboptimal and does not give any idea towards the kind
  of Architecture
* since it is based on AXI4 memory mapped interfaces it is renamed to
  axi4mm
* fixed all occurrences of baseline

* Compose started an HLS task for every PE in a Composition
* problem, if Core does not have a Kernel (imported IP-XACT)
* wanted to fix that in any case, but until now it was just a
  convenience/efficiency thing, now it was a bug

* latency data now contains min, max and average
* new Json format implemented in scala
* fixed several minor issues in case of errors

* changed to better name reflecting composition, target and freq

* fixed occurrences, renamed the member

* fixes support for 2016.4 and 2017.1
* improved modularity by implementing shared platform::generate
* checking results of runs in Vivado, adding list of logs to check in
  case of error
* cleanup

* compare support was completely broken, a wonder that the code ever
  seemed to work at all
* comparison of the actual Composition was missing; comparing
  Compositions is a bit tricky due to many isomorphisms in the
  definition
* opted to compare area utilization instead: Unlikely that two different
  compositions in the same DSE run will ever have _exactly_ the same
  number of LUTs, FFS, etc.
* should work now, comparison order: area, h-value, frequency

* previous RE did include many other runme.logs, fixed

* added only synth_1/runme.log, impl_1/runme.log
* tracking all runme.logs just scrambled the output and generated a lot
  of CPU load
* need better way to distinguish the sources; colors?

* missing report now correctly triggers re-evaluation of the core
* moved core.description file into 'ipcore' subdirectory
* fixed problem with relative paths for import file

* was in fact not implemented; fixed

* added new message to regex
* will subsume all placer errors of the form 'ERROR: [Place...'

* changed order to: Arch/Platform/Kernels/Counts/Freq
* makes a lot of sense, easier to find bitstreams for a given target