1. 24 Jan, 2018 4 commits
    • Jens Korinth's avatar
      Remove support for Vivado 2016.4 · 4f684b2a
      Jens Korinth authored
      4f684b2a
    • Jens Korinth's avatar
      Pull tapasco-status 1.21 · be0a4b94
      Jens Korinth authored
      * Chisel-generated Verilog is flattened into single module to avoid
        Verilog name conflicts
      be0a4b94
    • Jens Korinth's avatar
      Fix bug in address map construction · d668d82b
      Jens Korinth authored
      * internal master-slave connections do not appear in get_address_map
      * so their segments were not mapped, resulting in errors, e.g., for DMA
      * fix: when address map does not contain interfaces, it will try to
        deduce range and offset from properties of the segment instead of
        failing
      d668d82b
    • Jens Korinth's avatar
      Squashed commit of the following: · 86b53707
      Jens Korinth authored
      commit 39e7a1cb
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 13:44:20 2018 +0100
      
          Bugfix in ZC706 fancontrol plugin
      
      commit 6a06399b
      Author: Lukas Sommer <lukas.sommer.mail@gmail.com>
      Date:   Wed Jan 24 12:39:49 2018 +0100
      
          Moved filter condition for active-high resets to correct command;
      
      commit cba13f81
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 11:28:40 2018 +0100
      
          Arch: Fix bug in PE reset connections
      86b53707
  2. 23 Jan, 2018 7 commits
  3. 22 Jan, 2018 4 commits
  4. 21 Jan, 2018 2 commits
  5. 19 Jan, 2018 22 commits
  6. 18 Jan, 2018 1 commit