- 25 Aug, 2017 3 commits
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Jens Korinth authored
Merge commit '2f16edbf19e62a15e4770e960b05be552770e6d5'
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Jens Korinth authored
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- 23 Aug, 2017 1 commit
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Jens Korinth authored
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- 15 Jul, 2017 5 commits
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Jens Korinth authored
Pulled chisel-miscutils.
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Jens Korinth authored
6b570c6 Fix bug in DecoupledDataSourceSuite dee2777 Update README.md ad4e6f3 README.md edited online with Bitbucket 3528414 Update to Chisel 3.0 (SNAPSHOT) git-subtree-dir: miscutils git-subtree-split: 6b570c6a26a7707719404beace67a289289c90ed
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Jens Korinth authored
Pulled chisel-miscutils.
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Jens Korinth authored
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- 01 Oct, 2016 5 commits
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Jens Korinth authored
* miscutils, packaging are subprojects which are depended upon * configured correspondingly in build.sbt, removed symlinks in src * defined metadata for build artifact (incl. version) * updated .gitignore to ignore temp files in subprojects
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Jens Korinth authored
6d4e97b Add build.sbt to define artifact git-subtree-dir: miscutils git-subtree-split: 6d4e97bfae9ff6dcb1f106ca6dd94bf086d40c77
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Jens Korinth authored
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Jens Korinth authored
99804e52 Add build.sbt to define artifact 401df026 Add support for post-build actions git-subtree-dir: packaging git-subtree-split: 99804e52
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Jens Korinth authored
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- 30 Sep, 2016 2 commits
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Jens Korinth authored
* AXI4Lite interface * flexible ControlRegister class hierarchy: constants, single values, virtual registers (callbacks) * implemented unit test cases * had to implement Axi4LiteProgrammableMaster for batch testing
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Jens Korinth authored
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- 28 Sep, 2016 1 commit
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Jens Korinth authored
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- 18 Sep, 2016 1 commit
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Jens Korinth authored
* muxes N AXI-MM masters to one AXI-MM slave * read and write channels are mux'ed independently * no interruptions during bursts, next schedule on LAST * address valid is used to signal transfer requests * may cost up to N-1 cycles latency
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- 14 Sep, 2016 3 commits
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Jens Korinth authored
* renameSignals on AXI bundle should support prefix and suffix in order to accomodate multiple instance of the interface in one module
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Jens Korinth authored
* configurable sliding window module with AXI DMA backend * uses AxiFifoAdapter internally to retrieve data from AXI slave * shifts with Decoupled interface * generic module for arbitrary bitwidths / data types
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Jens Korinth authored
* has method to fill AxiSlaveModel with structured data for testing
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- 12 Sep, 2016 1 commit
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Jens Korinth authored
* moved config params into sealed case class * unified constructors to use new config object * added companion object for convenience constructors (backward compatible) * changed constructor calls in unit tests accordingly
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- 02 Sep, 2016 3 commits
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Jens Korinth authored
* size parameter indicates automatic address wrapping * no need for resets in between (not always feasible) * wraps on overflow to current value of `base` input
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Jens Korinth authored
* new methods allow getter access via address or index * set method supports writing at address
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Jens Korinth authored
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- 27 Aug, 2016 5 commits
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Jens Korinth authored
git-subtree-dir: miscutils git-subtree-split: 0fec184f
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Jens Korinth authored
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Jens Korinth authored
git-subtree-dir: packaging git-subtree-split: d2df30ff
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Jens Korinth authored
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Jens Korinth authored
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- 06 Aug, 2016 1 commit
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Jens Korinth authored
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- 05 Aug, 2016 2 commits
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Jens Korinth authored
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Jens Korinth authored
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- 04 Aug, 2016 2 commits
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Jens Korinth authored
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Jens Korinth authored
* addresses should only be handshaked when data is actually avaiable / needed; previous logic would provide addresses as fast as possible * this fixes problems with handshaken addresses at other modules when adapter is being reset
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- 01 Aug, 2016 1 commit
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Jens Korinth authored
* opposed to FifoAxiAdapter, addresses may only be supplied via the interface if data will be read (slave will supply data) * this bug led to erroneous read bursts, overflowing the buffer * fixed some minor condition issues
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- 31 Jul, 2016 3 commits
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Jens Korinth authored
* addressess in transactions should be supplied as fast as possible * waiting for the transaction to finish is not necessary and harms performance * not sure if this implementation is ok; there could be a large gap between address handshake and data - if this blocks the slave it must be fixed (further tests required)
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Jens Korinth authored
* asserts cause unit test to fail w/o VCD dump
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Jens Korinth authored
* replaced tick-tock-buffers with single FIFO * burst size now independent of buffer size * bursts start immediately when FIFO has space for one burst * operation similar to FifoAxiAdapter * unit tests work unchanged
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- 27 Jul, 2016 1 commit
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Jens Korinth authored
* considering the significant delays for real-world rw access to memory, AxiSlaveModel should have optional delays to sim that behavior * extracted config to AxiSlaveModelConfiguration class * adapted existing unit test suites * bugfix in Axi2AxiSuite: afa now waits for writes to finish
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