- Works with the new status core format
    - Correctly verify size and offset of components
    - Made the status core JSON format more concise, e.g. no more
    unrelated lists for PE info and the offsets of the PE
    - Simplified compilation and various places and reduced
    interdependencies

    - Renamed TCL to Vivado for clearer directory names
    - Improves JSON produced by Vivado flow: Capabilities with name
    instead of hard-coded, Easier Structure for Architecture addresses
    - Adds Rust tool to encode JSON as Flatbuffer binary
    - Replaces custom Tapasco status core with simple AXI BRAM
    controller

* needed to adjust the base address to be multiples of their range

* second run would mess up the address map if masters are present
* fixed and made the whole thing a little bit more stable

* arch::get_address_map now also registers the PEs so that the dynamic
  address map can be populated accordingly
* improved cap setting with single-point-of-truth: platform_caps.h is
  parsed in Tcl to generate the bit values for strings, making changes
  to the value easier
* used new approach in design master template

Squashed commit of the following:

commit 13fdb518
Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
Date:   Fri Mar 2 22:34:38 2018 +0100

    Recognize Tcl errors in Vivado logs

commit 90b74d7c
Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
Date:   Fri Mar 2 15:04:11 2018 +0100

    Make ILA debug feature generic for all platforms

    * only get_debug_nets depends on the platform
    * rest moved to platform/common/plugins
    * supporting platforms implement wrapper plugin, see
      platform/zynq/plugins/debug.tcl
    * fixed several other issues, e.g., clock selection
    * closes #132 - no master compositions

commit cc8a2df2
Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
Date:   Fri Mar 2 10:57:10 2018 +0100

    Bugfixes in Debug feature

    * added ILA implementation feature on VC709
    * fixed SILA implementation feature on axi4mm
    * fixed renamed pos...