1. 02 Mar, 2018 1 commit
    • Jens Korinth's avatar
      Bugfixes in Debug feature · cc8a2df2
      Jens Korinth authored
      * added ILA implementation feature on VC709
      * fixed SILA implementation feature on axi4mm
      * fixed renamed post-bd event to pre-wrapper in several plugins
      * fixed wrong VLNV for SILA in 2017.4
      cc8a2df2
  2. 01 Mar, 2018 2 commits
  3. 27 Feb, 2018 4 commits
  4. 23 Feb, 2018 2 commits
    • Jens Korinth's avatar
      Bugfix in O3 · 76275656
      Jens Korinth authored
      76275656
    • Jens Korinth's avatar
      Implement optimizations levels and sweeping in import · 786777b1
      Jens Korinth authored
      Squashed commit of the following:
      
      commit 60953ed4
      Merge: 3380ebc2 b1c08ad7
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Fri Feb 23 09:04:24 2018 +0100
      
          Merge branch '2018.1' into evaluate-optimizations
      
      commit 3380ebc2
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Fri Feb 23 08:49:49 2018 +0100
      
          Extend optimization 42 target period span
      
          * extended range from 0.5 to 10ns (2GHz - 100MHz)
          * increased step size to 0.25ns => 38 measurements
          * fixed bug in optimization level 1/2 settings
          * improved O3 level to even more aggressive settings
          * added sweep, remapping and constant propagation to initial netlist
            optimization
      
      commit 44e5ca91
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Sun Feb 18 08:04:15 2018 +0100
      
          Fix bug in optimization 42 loop
      
      commit ea32698b
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Sat Feb 17 15:45:01 2018 +0100
      
          Fix bug in evaluate optimization 42
      
          * files would be prematurely closed in loop
      
      commit d81319fa
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Fri Feb 16 21:06:56 2018 +0100
      
          Move flatten hierarchy to O2
      
      commit 7acd060d
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Fri Feb 16 21:05:51 2018 +0100
      
          Increase default target frequency in Import to 1GHz
      
      commit 2dbe1061
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Fri Feb 16 08:27:27 2018 +0100
      
          Re-activate normal evaluation
      
          * fixed optimization 42 implementation: normal runs (O != 42) are
            executed in single run mode
          * fixed bug with SAIF reading
          * fixed common_ip bug
      
      commit 095f9417
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Fri Feb 16 07:06:39 2018 +0100
      
          Remove clock pinning and time limit for opt 42
      
      commit 061d43bb
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Tue Feb 13 16:00:24 2018 +0100
      
          Reactivate clock pinning
      
          * also fixes some output bugs
      
      commit 4ae807ea
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Fri Feb 9 06:34:28 2018 +0100
      
          Fix bugs in optimzation debug mode 42
      
      commit bc7c9676
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Feb 8 18:10:45 2018 +0100
      
          Fix typo
      
      commit 02f83925
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Feb 8 18:05:54 2018 +0100
      
          Fix O-level iterations
      
          * O-level iterations included only the synthesis phase, not PnR; thus
            PnR was always done on O0 synthesis results
          * fixed - PnR is now included in loop
      
      commit ecc9e235
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Feb 8 17:36:12 2018 +0100
      
          WIP: Implement special synthesis optimization evaluation level
      
          * level 42 activates a sweep search that iterates over
              - clock periods 0.5 - 5 (0.125 steps)
              - optimization levels 3 - 0
          * it also logs the runtimes of each step and outputs them in a
            synthesis_runtimes.tsv file
          * resulting WNS is logged in synthesis_results.tsv for each step
          * useful for analysis of evaluation runs
          * careful - regular evaluation is currently broken by the changes
      
      commit 5d081bae
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Feb 8 17:35:49 2018 +0100
      
          Fix bug in optimization level passing from parser
      
      commit 47bb3dad
      Merge: a7138abf 3d912101
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Feb 8 10:55:45 2018 +0100
      
          Merge branch '2018.1' of git:tapasco/tapasco into evaluate-optimizations
      
      commit a7138abf
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Feb 7 11:10:21 2018 +0100
      
          WIP: define optimization levels during evaluation
      
          * evaluation results are too conservative w.r.t. f_max
          * adding new --optimization flag for import task that defines gcc-like
            opt levels, which activate different synth + pnr options
          * Tcl does not work yet
      786777b1
  5. 08 Feb, 2018 1 commit
  6. 30 Jan, 2018 2 commits
  7. 25 Jan, 2018 5 commits
    • Jens Korinth's avatar
      Squashed commit of the following: · dcc6c418
      Jens Korinth authored
      commit 802a3eea
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 25 12:58:22 2018 +0100
      
          CI: Reactivate everything, with new compose-features stage
      
      commit d0fb3e37
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 25 12:55:43 2018 +0100
      
          F'in yml
      
      commit 6c8e648d
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 25 12:53:22 2018 +0100
      
          YML debugging
      
      commit 155ed589
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 25 12:51:22 2018 +0100
      
          YML debugging
      
      commit 4a6408b6
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 25 12:49:36 2018 +0100
      
          YML debugging
      
      commit 1b09ffb8
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 25 12:47:22 2018 +0100
      
          Distinguish compose with and without features in jobs
      
      commit ec2af8ed
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 25 12:43:24 2018 +0100
      
          Reactivate compose jobs
      
      commit 09d289a8
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 25 12:41:17 2018 +0100
      
          Deactivate all jobs but compose without features
      
      commit 40c7cba6
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 25 11:34:15 2018 +0100
      
          Fix potential hanging LogTrackingFileWatcher in EvaluateIP
      
      commit f31d740c
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 25 11:19:20 2018 +0100
      
          Temporarily increase logging of file watcher (again)
      
      commit f12a9074
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 25 10:45:05 2018 +0100
      
          Fix truncated log output in verbose mode
      
          * when an activity exits quickly with an error, verbose mode would often
            omit the most important last few lines of the log
          * reason: flushing the data to disk takes longer than for the Tapasco
            threads to die, thus LogTrackingFileWatcher exits before lines appear
          * workaround: when both waitingFor and files are empty, MultiFileWatcher
            now waits one more iteration before exiting, which seems to suffice
      
      commit f9148c81
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 25 10:22:09 2018 +0100
      
          Squashed commit of the following:
      
          commit d3245516
          Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
          Date:   Thu Jan 25 10:19:19 2018 +0100
      
              Closes #149 - Zedboard Synthesis fails for 2017.3 and 2017.4
      
              * improved sys clock detection by checking available interfaces via
                get_board_part_interfaces, instead of trying sys_diff_clock first
              * also removed second warning when get_bd_pins returns nothing
              * removed old, unused platform code
      
          commit 9a0fb9b0
          Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
          Date:   Thu Jan 25 10:18:03 2018 +0100
      
              Use Arty-Z7-20 board file from Digilent for PyNQ
      
              * contains the manually set top.xdc directives
              * identical to Pynq, except for peripheral components
      
          commit f6a25afc
          Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
          Date:   Thu Jan 25 10:16:28 2018 +0100
      
              Update board definition for zedboard
      
              * Digilent has newer def of ZedBoard, using that automatically now
              * imported via MYVIVADO / XILINX_PATH env vars
      
          commit a29aa6cc
          Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
          Date:   Thu Jan 25 10:14:39 2018 +0100
      
              Fix minor bug in PS7 instantiation routine
      
          commit c782eadc
          Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
          Date:   Thu Jan 25 10:13:58 2018 +0100
      
              Remove 2016.4 specific code from design.master.tcl.template
      
      commit f873c47b
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 25 08:23:54 2018 +0100
      
          Closes #137 for HLS
      
      commit 88259aa0
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 17:01:44 2018 +0100
      
          Activate pipelines on branch gitlab-ci
      
      commit d09278de
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 16:58:38 2018 +0100
      
          Deactivate sbt-prepare on all except master and 20xx.x branches
      
      commit 9df2a6a6
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 16:54:40 2018 +0100
      
          Another fix regarding precision_counter
      
      commit 30f9ac5b
      Merge: c0ed8ed6 fc930ec8
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 16:53:33 2018 +0100
      
          Merge branch 'pe-local-memories' of git:tapasco/tapasco into gitlab-ci
      
      commit c0ed8ed6
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 16:52:05 2018 +0100
      
          Remove precision_counter from composition
      
          * caches are not always available, so precision_counter is not
            available, causing runs to fail
          * annoying, removed precision_counter for now
      
      commit 35b46901
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 15:56:50 2018 +0100
      
          Restrict CI pipelines to master and 20xx.x branches
      
      commit 0a0dc675
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 15:45:13 2018 +0100
      
          Activate verbose output in CI HLS jobs
      
      commit 240ad939
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 15:33:48 2018 +0100
      
          Test of generated yml
      
      commit 4f684b2a
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 15:33:32 2018 +0100
      
          Remove support for Vivado 2016.4
      
      commit be0a4b94
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 14:54:25 2018 +0100
      
          Pull tapasco-status 1.21
      
          * Chisel-generated Verilog is flattened into single module to avoid
            Verilog name conflicts
      
      commit d668d82b
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 14:52:30 2018 +0100
      
          Fix bug in address map construction
      
          * internal master-slave connections do not appear in get_address_map
          * so their segments were not mapped, resulting in errors, e.g., for DMA
          * fix: when address map does not contain interfaces, it will try to
            deduce range and offset from properties of the segment instead of
            failing
      
      commit 86b53707
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 24 13:45:58 2018 +0100
      
          Squashed commit of the following:
      
          commit 39e7a1cb
          Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
          Date:   Wed Jan 24 13:44:20 2018 +0100
      
              Bugfix in ZC706 fancontrol plugin
      
          commit 6a06399b
          Author: Lukas Sommer <lukas.sommer.mail@gmail.com>
          Date:   Wed Jan 24 12:39:49 2018 +0100
      
              Moved filter condition for active-high resets to correct command;
      
          commit cba13f81
          Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
          Date:   Wed Jan 24 11:28:40 2018 +0100
      
              Arch: Fix bug in PE reset connections
      
      commit c830c899
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Tue Jan 23 09:00:20 2018 +0100
      
          Improve locking behavior of MultiFileWatcher
      
      commit 58542825
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Tue Jan 23 08:22:55 2018 +0100
      
          Reactivate verbose mode in compose
      
      commit b97700d3
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Tue Jan 23 06:31:23 2018 +0100
      
          Remove --maxTasks from HLS and Import
      
      commit 25c503b6
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Tue Jan 23 06:25:15 2018 +0100
      
          Deactivate resource logging, increase tasks for HLS and import
      
      commit ac61a13d
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Tue Jan 23 06:19:29 2018 +0100
      
          Remove tapasco-status building from sbt-prepare job
      
      commit 4c6f2657
      Merge: 3691ea58 d1f36ab4
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Tue Jan 23 06:15:50 2018 +0100
      
          Merge branch 'pe-local-memories' of esagitlab:tapasco/tapasco into gitlab-ci
      
      commit 3691ea58
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Mon Jan 22 14:33:00 2018 +0100
      
          Change .gitlab-ci.yml to use new maxTasks param
      
      commit ea7c3934
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Mon Jan 22 14:30:06 2018 +0100
      
          Closes #147 - Implement maxTasks option
      
          * now supports --maxTasks command line / JSON option to limit the number
            of parallel tasks executed by TaPaSCo
      
      commit f8d090ae
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Sun Jan 21 15:32:51 2018 +0100
      
          Temporarily increase logging to debug OOM problems
      
      commit 3cb861b2
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Sun Jan 21 12:46:13 2018 +0100
      
          Limit threads to 1 to remove oom errors
      
      commit c02630a5
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 18:36:37 2018 +0100
      
          Adds artifact passing between hls and compose
      
      commit e2c63695
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 18:02:27 2018 +0100
      
          Changes for shared caches
      
      commit 82d85c69
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 17:11:36 2018 +0100
      
          Try to cache as much as possible
      
      commit 36be0ac0
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 17:04:08 2018 +0100
      
          Removes /cache
      
      commit 6a046f78
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 17:03:27 2018 +0100
      
          Adds cache_global
      
      commit fce5833e
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 17:00:42 2018 +0100
      
          Adds /opt/cad ls for debugging
      
      commit 0bb7f526
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 16:52:50 2018 +0100
      
          Adds cache test
      
      commit 5e410f65
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 16:24:17 2018 +0100
      
          Removes -v so tapasco finishes
      
      commit 532b1ba1
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 16:10:45 2018 +0100
      
          Reverts changes to default image
      
      commit 25d70ece
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 16:09:42 2018 +0100
      
          Replaces _JAVA_OPTIONS with SBT_OPTS
      
              - _JAVA_OPTIONS seems to annoy Vivado HLS and results in random
              crashes
      
      commit b1bbfe5f
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 14:48:33 2018 +0100
      
          Compile only one platform for hls
      
      commit 90adf995
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 14:27:31 2018 +0100
      
          He said I should add an s
      
      commit 16664088
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 14:26:19 2018 +0100
      
          Adds artifact for hls builds
      
      commit 53f0ae16
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 13:18:53 2018 +0100
      
          Mkaes hls verbose for debugging
      
      commit 2becdf3c
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 13:03:15 2018 +0100
      
          Removes space (and time)
      
      commit 3a444c26
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 12:03:51 2018 +0100
      
          Adds check for cache success
      
      commit cd75f301
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 12:01:16 2018 +0100
      
          Checks if vivado is included properly
      
      commit 425b8e98
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 11:48:36 2018 +0100
      
          Changes sbt-prepare cache policy to push
      
      commit c2f3b5ac
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 11:47:09 2018 +0100
      
          Replaces artifacts with cache
      
              - For now only sbt-prepare is shared for further jobs
              - There should be further sharing between Import and Compose
      
      commit b2b2d9b6
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Fri Jan 19 10:52:51 2018 +0100
      
          Revert "Fixes #145 - Building status core fails"
      
          This reverts commit 32047b00.
          The error this commit fixes was already fixed in a new Dockerfile
          version.
      
      commit 32047b00
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Fri Jan 19 10:40:58 2018 +0100
      
          Fixes #145 - Building status core fails
      
      commit 55718f4f
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Thu Jan 18 17:42:33 2018 +0100
      
          Removes import as dependency for compose
      
      commit 89b6f957
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Thu Jan 18 17:23:25 2018 +0100
      
          Reduces artifact size by compressing them
      
      commit 17a28552
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Thu Jan 18 16:06:44 2018 +0100
      
          Source Vivado
      
              For whatever reason .bashrc is not evaluated...
      
      commit 2cd05d74
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Thu Jan 18 15:49:46 2018 +0100
      
          Revert back to targetted artifacts because of size constraints
      
      commit fb4284aa
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Thu Jan 18 15:36:41 2018 +0100
      
          Get all untracked files for prepare stage
      
      commit 2f87a5f7
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Thu Jan 18 15:25:29 2018 +0100
      
          Bin is needed as artifact as well
      
      commit 29b4cd38
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Thu Jan 18 15:07:22 2018 +0100
      
          Limit artifacts to .ivy2 and .sbt
      
      commit 5524d39a
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Thu Jan 18 14:55:06 2018 +0100
      
          Adapts import-template to new format
      
      commit c53313a0
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Thu Jan 18 14:52:57 2018 +0100
      
          Used tapasco image and artifact sbt
      
      commit 7fd62db1
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 18 13:58:10 2018 +0100
      
          Implement import task as pipeline stage
      
      commit 6e9c33a9
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 18 13:51:34 2018 +0100
      
          Improve logging in Zynq platform Tcl
      
      commit e1758dbb
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 18 13:51:02 2018 +0100
      
          Improve logging in platform common Tcl
      
      commit 090f4481
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 18 13:50:32 2018 +0100
      
          Improve logging in tapasco::ip
      
      commit a6e9559d
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 18 13:49:58 2018 +0100
      
          Activate PE-local memory capability by default
      
      commit e3682565
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 18 13:49:40 2018 +0100
      
          Bugfix in Arch address map for unconnected masters
      
      commit b8b5dd0a
      Merge: dd6ac83b 8d677bb7
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 18 07:59:19 2018 +0100
      
          Pull tapasco-status
      
          Merge commit '8d677bb7' into gitlab-ci
      
      commit 8d677bb7
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Thu Jan 18 07:58:18 2018 +0100
      
          Squashed 'common/ip/tapasco_status/' changes from e209f949..3fd53e7
      
          3fd53e7 Pull chisel-axi
          41e37e7 Squashed 'axi/' changes from b8f4c554..01fad68
          88624e0 Pull chisel-packaging
          872f551 Squashed 'packaging/' changes from 134b2f62..c22243b
          f94b6de3 Remove caching of ivy repo from pipeline
          43c331dc Pull chisel-axiutils
          5937e2aa Implement cap0 bitfield
          26d61dd6 Bugfix in pipeline
          1030ffe5 Cache ivy2 repo in pipeline builds
          14876b2e Implement support for capability field in Status Core
          2a3e6856 Fix removed '<<=' sbt operator
          bccc8a73 Run sbt test in GitLab pipeline
          17e1a3a7 Fix bug concerning empty slots
          5a089419 Ignore compiled python scripts in .gitignore
          0f0a2d84 Update packaging to GitHub-version of Chisel3
          a162cfae Update miscutils to GitHub-version of Chisel3
          f0265156 Remove ununsed Scalactic dep
          d146b992 Rename RegisterFile saxi port to s_axi
      
          git-subtree-dir: common/ip/tapasco_status
          git-subtree-split: 3fd53e7038ab7e1ff485eee94c3516f72b9604ea
      
      commit dd6ac83b
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Wed Jan 17 21:31:34 2018 +0100
      
          Adds verbose flag for compose debugging
      
      commit d5e9bc89
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Wed Jan 17 21:06:26 2018 +0100
      
          Fixes job naming in yaml
      
      commit 9b9304ee
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Wed Jan 17 21:04:59 2018 +0100
      
          Use artifacts to avoid reevaluation
      
      commit fd6843ad
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Wed Jan 17 20:45:10 2018 +0100
      
          Removes verbose flag to avoid lock ups
      
      commit 23f78ad7
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Wed Jan 17 20:12:12 2018 +0100
      
          Fixes gitlab-ci with Centos7
      
      commit 4c73c789
      Author: Jaco Hofmann <hofmann@esa.tu-darmstadt.de>
      Date:   Wed Jan 17 19:03:03 2018 +0100
      
          Change image type to centos
      
      commit 0b823caa
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 17 18:22:30 2018 +0100
      
          Implement stages and HLS
      
      commit 8e810c8c
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 17 16:33:51 2018 +0100
      
          Fix
      
      commit e34de5b8
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 17 16:32:18 2018 +0100
      
          Fix
      
      commit 0dbd2a57
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 17 16:23:07 2018 +0100
      
          Fix
      
      commit 408774c9
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 17 16:19:22 2018 +0100
      
          Fix setup script
      
      commit 38820724
      Author: Jens Korinth <jk@esa.cs.tu-darmstadt.de>
      Date:   Wed Jan 17 16:16:08 2018 +0100
      
          Implement automated regression tests
      dcc6c418
    • Jens Korinth's avatar
      Use Arty-Z7-20 board file from Digilent for PyNQ · 9a0fb9b0
      Jens Korinth authored
      * contains the manually set top.xdc directives
      * identical to Pynq, except for peripheral components
      9a0fb9b0
    • Jens Korinth's avatar
      Update board definition for zedboard · f6a25afc
      Jens Korinth authored
      * Digilent has newer def of ZedBoard, using that automatically now
      * imported via MYVIVADO / XILINX_PATH env vars
      f6a25afc
    • Jens Korinth's avatar
      Fix minor bug in PS7 instantiation routine · a29aa6cc
      Jens Korinth authored
      a29aa6cc
    • Jens Korinth's avatar
  8. 23 Jan, 2018 1 commit
  9. 18 Jan, 2018 2 commits
  10. 12 Jan, 2018 2 commits
    • Jens Korinth's avatar
      Add temporary support for 2017.3/4 · b4311e00
      Jens Korinth authored
      b4311e00
    • Jens Korinth's avatar
      Rebuild all Platforms using new skeleton · beb71c3d
      Jens Korinth authored
      * rebuilt PyNQ, zedboard and ZC706 without features
      * expanded subsystem package: standard and custom subsystems can be
        fetched (as bd cells) and their names queried (incl. custom)
      * Zynqs adapt the memory system to bypass
      * need to run more tests, but looks good
      * timing problems in VC709, need to investigate
      beb71c3d
  11. 11 Jan, 2018 2 commits
    • Jens Korinth's avatar
      Fix dual_dma constraints · 8a660e3d
      Jens Korinth authored
      8a660e3d
    • Jens Korinth's avatar
      Move all IP block related code into new namespace ip · 7ffe7520
      Jens Korinth authored
      * tapasco::ip contains methods to instantiate common IP
      * common/ip.tcl automatically generates methods based on the stdcomps
        directory: every name has its own instantiation method called
        create_<name>, which takes only a name as an argument
      * specialized constructors go into common_ip.tcl and can override the
        auto-generated ones
      * removed all createXY procs in common.tcl and fixed all dependent
        scripts accordingly
      * removed ill-fated "clocks_and_resets" bundle - sad, but didn't work
        correctly in Vivado
      7ffe7520
  12. 10 Jan, 2018 2 commits
  13. 09 Jan, 2018 2 commits
  14. 08 Jan, 2018 1 commit
  15. 05 Jan, 2018 6 commits
    • Jens Korinth's avatar
      WIP: reimagine basic Platform construction · 3cdff64a
      Jens Korinth authored
      * need to simplify Platform scripts, move more code into a common base
      * will generalize and unify the basic structure of the project
      * does not work yet, but looks promising
      3cdff64a
    • Jens Korinth's avatar
      Fix bug for Vivado HLS · d04440b0
      Jens Korinth authored
      * Vivado HLS does not have a -notrace parameter for source command
      d04440b0
    • Jens Korinth's avatar
      d4c91637
    • Jens Korinth's avatar
      Add common_ip.tcl as base catalog · 0c33be87
      Jens Korinth authored
      * common_ip.tcl will contain all basic ip VLNVs
      * only differences are recorded in the _20xx.tcl scripts
      0c33be87
    • Jens Korinth's avatar
      Fix problems with clocks and resets bridges · 8a43f455
      Jens Korinth authored
      * found a way to express in IP-XACT that the interfaces are only bridged
        directly; there seems to be no way of doing this via Vivado, but since
        Xilinx is using it themselves (e.g., System Cache) I hope it'll work
      * also remove interconnect_reset port, since they do not exist on the
        reset generators
      8a43f455
    • Jens Korinth's avatar
      Implement a bus abstraction for TaPaSCo clocks and resets · 84c35860
      Jens Korinth authored
      * new interface:
        esa.cs.tu-darmstadt.de:tapasco:tapasco_clocks_resets:1.0
      * bundles host, design and mem clocks and all reset kinds for easier
        connection of the subsystems
      * each subsystem should instantiate a ClocksResetsSlaveBridge to access
        the ports
      * the clocks and resets subsystem uses a ClocksResetsMasterBridge to
        propagate the clocks and resets
      * both IPs are zero-logic direct wire thruputs; only used to allow
        bundling at interface leve
      84c35860
  16. 04 Jan, 2018 1 commit
    • Jens Korinth's avatar
      Implement automatic build process for new Status Core · 15f96d39
      Jens Korinth authored
      * there is a subproject that is included as a subtree in
        common/ip/tapasco_status
      * subproject is standalone and can be run from Tcl
      * changed process in common.tcl: createTapascoStatus now generates a
        JSON configuration file and runs sbt in the subproject
      * each Composition gets its unique status core
      * status cores are cached in tapasco-status-cache in the main dir:
        when building the same composition a number of times, status cores can
        be reused; is removed automatically in sbt clean
      * required more API extensions: platform::get_address_map must be
        implemented by the Platform to communicate the address mapping to the
        status core creation
      * also added formal interface to capabilities in common.tcl:
        tapasco::add_capability_flag, tapasco::get_capability_flags and
        tapasco::set_capability_flags can be used by plugins to activate
        capability bits
      * whole process should be transparent to the user, everything is
        supposed to work as before
      * one exception: get_address_map is not yet implemented on VC709
      15f96d39
  17. 03 Jan, 2018 2 commits
  18. 29 Dec, 2017 2 commits