Commit 49396f7d authored by Jens Korinth's avatar Jens Korinth

Fix bugs in VC709 plugins (arg passing)

parent d0aabfa4
......@@ -13,7 +13,7 @@ namespace eval blue_dma {
}
proc set_constraints {{args {}}} {
if {[tpc::is_platform_feature_enabled "BlueDMA"]} {
if {[tapasco::is_platform_feature_enabled "BlueDMA"]} {
puts "Adding false path constraints for BlueDMA"
set constraints_fn "[get_property DIRECTORY [current_project]]/bluedma.xdc"
set constraints_file [open $constraints_fn w+]
......@@ -26,6 +26,7 @@ namespace eval blue_dma {
close $constraints_file
read_xdc -cells {system_i/Memory/dual_dma} $constraints_fn
}
return {}
}
}
......
......@@ -26,6 +26,7 @@ namespace eval dual_dma {
proc set_constraints {{args {}}} {
puts "Setting constraints for dual_dma ..."
read_xdc -cells {system_i/Memory/dual_dma} "$::env(TAPASCO_HOME)/common/ip/dual_dma_1.0/dual_async_m32_m64.xdc"
return {}
}
}
......
......@@ -90,6 +90,7 @@ namespace eval leds {
connect_bd_net -net pcie_aclk_net $pcie_aclk [get_bd_pins $gp_led/aclk]
connect_bd_net -net pcie_aresetn_net [get_bd_pins "/PCIe/pcie_aresetn"] [get_bd_pins $gp_led/aresetn]
}
return {}
}
}
......
......@@ -53,14 +53,14 @@ namespace eval debug {
foreach s $defsignals {
set net [get_nets -hier "*$name$s"]
puts " adding net $net for signal $s ..."
if {[llength $net] > 1} { lappend ret $net } { lappend ret [list $net] }
if {[llength $net] > 1} { lappend ret $net } { lappend ret [list $net] }
}
}
foreach m {"system_i/Host_M_AXI_GP0"} {
foreach s $defsignals {
set net [get_nets "$m$s"]
puts " adding net $net for signal $s ..."
if {[llength $net] > 1} { lappend ret $net} { lappend ret [list $net] }
if {[llength $net] > 1} { lappend ret $net} { lappend ret [list $net] }
}
}
puts " signal list: $ret"
......@@ -86,15 +86,16 @@ namespace eval debug {
if {$use_defaults} { foreach n [get_debug_nets] { lappend dnl $n }}
if {[llength $nets] > 0} {
foreach n $nets {
set nnets [get_nets -hier $n]
puts " for '$n' found [llength $nnets] nets: $nnets"
foreach nn $nnets { lappend dnl [list $nn] }
}
set nnets [get_nets -hier $n]
puts " for '$n' found [llength $nnets] nets: $nnets"
foreach nn $nnets { lappend dnl [list $nn] }
}
}
# create ILA core
tapasco::create_debug_core [get_nets system_i/Host_fclk0_aclk] $dnl $depth $stages
reset_run synth
}
return {}
}
proc write_ltx {} {
......@@ -103,6 +104,7 @@ namespace eval debug {
puts "Writing debug probes into file ${bitstreamname}.ltx ..."
write_debug_probes -force -verbose "${bitstreamname}.ltx"
}
return {}
}
}
......
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