Commit 61946093 authored by Jaco Hofmann's avatar Jaco Hofmann

Release of Tapasco 2019.6

parents 3130cc95 b5dd38b4
Pipeline #1329 passed with stages
in 197 minutes and 31 seconds
......@@ -13,6 +13,7 @@ stages:
.test_tapasco:
stage: software_tests
retry: 2
variables:
JAVA_VERSION: "8.0.212-zulu"
SBT_VERSION: "1.2.8"
......@@ -70,6 +71,7 @@ test_tapasco_sbt_1_2_8:
.build_sbt_tapasco:
stage: build_sbt
retry: 2
tags:
- High
script:
......@@ -143,6 +145,7 @@ build_sbt_tapasco_ubuntu_19_04:
# as we are running in a docker instance, we cannot use tapasco-build-libs
.build_kernel_ubuntu:
stage: build_kernel
retry: 2
variables:
MODE: "release"
tags:
......@@ -150,7 +153,7 @@ build_sbt_tapasco_ubuntu_19_04:
script:
- apt-get -y update && apt-get -y install build-essential linux-headers-generic python libelf-dev
- source setup.sh
- for d in `ls /lib/modules`; do echo "Building for linux headers in $d"; pushd tlkm; make LINUX_HOME="/lib/modules/$d/build" clean && make LINUX_HOME=/lib/modules/$d/build -j $MODE; popd; done
- for d in `ls /lib/modules`; do echo "Building for linux headers in $d"; pushd tlkm; make LINUX_HOME="/lib/modules/$d/build" clean && make LINUX_HOME=/lib/modules/$d/build -j 1 $MODE; popd; done
artifacts:
paths:
- tlkm/tlkm.ko
......@@ -197,6 +200,7 @@ build_kernel_ubuntu_19_04_debug:
.build_kernel_fedora:
stage: build_kernel
retry: 2
variables:
MODE: "release"
tags:
......@@ -204,7 +208,7 @@ build_kernel_ubuntu_19_04_debug:
script:
- dnf -y install kernel-devel make gcc gcc-c++ elfutils-libelf-devel
- source setup.sh
- for d in `ls /usr/src/kernels/`; do echo "Building for linux headers in $d"; pushd tlkm; make LINUX_HOME="/usr/src/kernels/$d" clean && make LINUX_HOME=/usr/src/kernels/$d -j $MODE; popd; done
- for d in `ls /usr/src/kernels/`; do echo "Building for linux headers in $d"; pushd tlkm; make LINUX_HOME="/usr/src/kernels/$d" clean && make LINUX_HOME=/usr/src/kernels/$d -j 1 $MODE; popd; done
artifacts:
paths:
- tlkm/tlkm.ko
......@@ -291,6 +295,7 @@ build_kernel_fedora_31_debug:
.build_tapasco:
stage: build_runtime
retry: 2
variables:
MODE: "release"
tags:
......@@ -451,12 +456,15 @@ tapasco_hls:
.tapasco_compose:
stage: build_hw
retry: 2
variables:
VIVADO_VERSION: "2018.2"
XILINX_VIVADO: "/opt/cad/xilinx/vivado/Vivado/${VIVADO_VERSION}"
XILINXD_LICENSE_FILE: "/opt/cad/keys/xilinx"
PLATFORM: "pynq"
tags:
- CAD
- High
image: fedora:28
before_script:
- dnf -y install which unzip git zip tar findutils libX11 gcc gcc-c++ python
......@@ -473,7 +481,7 @@ tapasco_hls:
- source setup.sh
- sbt assembly
- tapasco hls counter -p pynq --skipEvaluation
- tapasco -v compose [counter x 3] @ 100 MHz -p pynq
- tapasco -v --maxThreads 3 compose [counter x 3] @ 100 MHz -p $PLATFORM
tapasco_compose_17_4:
variables:
......@@ -494,3 +502,14 @@ tapasco_compose_18_3:
variables:
VIVADO_VERSION: "2018.3"
extends: .tapasco_compose
tapasco_compose_19_1:
variables:
VIVADO_VERSION: "2019.1"
extends: .tapasco_compose
tapasco_compose_pcie:
variables:
VIVADO_VERSION: "2018.3"
PLATFORM: "vc709"
extends: .tapasco_compose
......@@ -5,9 +5,9 @@ project(tapasco VERSION 1.0 LANGUAGES C CXX)
SET(CPACK_GENERATOR "RPM" "DEB" "TGZ" "ZIP" "STGZ" "TBZ2")
SET(CPACK_PACKAGE_CONTACT "korinth@esa.tu-darmstadt.de")
SET(CPACK_PACKAGE_VERSION_MAJOR 2018)
SET(CPACK_PACKAGE_VERSION_MINOR 2)
SET(CPACK_PACKAGE_VERSION_PATCH 1)
SET(CPACK_PACKAGE_VERSION_MAJOR 2019)
SET(CPACK_PACKAGE_VERSION_MINOR 6)
SET(CPACK_PACKAGE_VERSION_PATCH 0)
INCLUDE(CPack)
......
# TaPaSCo Contributor's Guide #
This guide assembles important information for people interested in contributing
to TaPaSCo.
## Intro ##
The code base of TaPaSCo consists of three main parts:
* The `tapasco` tool for interfacing with HLS, composing designs and running
design-space exploration. This part is written entirely in ***Scala***.
* The definitions of platforms, architectures, features and plugins. These are
mostly written in ***TCL***, a language understood by most EDA/CAD tools.
* The TaPaSCo API and Linux kernel driver (*TaPaSCo loadable kernel module*,
tlkm) for interfacing with accelerators from software. This part is written
in ***C/C++***.
We welcome contributions to all three parts. If you want to contribute to
TaPaSCo, but do not know where to start, you can either have a look at issues
on Github [labeled with "good first issue"](https://github.com/esa-tu-darmstadt/tapasco/issues?q=is%3Aopen+is%3Aissue+label%3A%22good+first+issue%22+no%3Aassignee)
or [contact us](mailto:tapasco@esa.tu-darmstadt.de).
## Coding Style ##
The (at least) four different languages currently used in the TaPaSCo code base
of course require different coding styles and practices. Nevertheless, there is
a number of general guidelines you should follow:
* **Use idiomatic code style:** For each of the languages, there is a set of
commonly accepted best practices, idioms and styling guidelines. Follow these
practices.
* **Use meaningful names for functions, variables, classes, etc.:** This should
go without saying, however, we want to remind you to use meaningful names
for the entities in your code.
* **Document your code:** This should also be a given. Include comments in your
code, in particular for complicated statements or parts difficult to understand.
* **Follow the given indentation scheme:** You should use the same scheme for
indentation as the existing code base, even if that does not match your personal
preference. Please also make sure that your editor/IDE is not breaking things
in the background.
* **Test your code:** Make sure everything still works as expected, after you
have introduced your change to the code. We do have CI in place, however we
cannot test every usage scenario with that. Please try to make sure to test the
functionality affected by your changes. For Scala, you can additionally provide
tests, which will be run with the `sbt test`-command by CI.
* **Add copyright header:** In case you create a new file, make sure to include
the TaPaSCo copyright header.
## Contribution Process ##
TaPaSCo uses the [git-flow](https://nvie.com/posts/a-successful-git-branching-model/) branching model for development. In short,
this means that the `develop`-branch is the central branch for development.
Features are developed on so-called feature branches, which are merged into
`develop` when the feature is complete. For releases, a release-branch is
forked from the develop branch and eventually merged into `master` to mark a
release. Please make yourself familiar with the git-flow model before starting
to develop.
The overall process for contributing to TaPaSCo looks as follows:
1. Create a fork of TaPaSCo under your personal account or your organization.
Simply use Github's fork-button for that.
2. Create a feature-branch (or hotfix, whatever applies) from develop. We use
the default naming convention of the [git flow-extension](https://de.atlassian.com/git/tutorials/comparing-workflows/gitflow-workflow), make sure to follow the same
convention (feature branches are prefixed with "feature/"). Use a meaningful
name for your feature branch.
3. Commit your changes to the feature branch. During development, make sure to
follow the coding style guidelines listed above. Also avoid unrelated changes,
i.e. changes to parts of the code that have nothing to do with your feature, as
these make it hard to review a contribution.
4. After you have completed your feature, create a new pull request in the
main TaPaSCo repository on Github. Make sure to setup **develop** as the target
branch of your pull request. In the pull request, provide a short description
of your feature that we can also use for release notes.
5. The pull request feature of Github will show you whether your branch can be
merged automatically (no conflicts) or needs manual merging. In the first case,
we will use the automatic **rebase and merge**-feature to merge your feature
after review. In the latter case, please manually integrate the changes that have
happened on the `develop`-branch while you were developing your feature using
`git merge`. If you need changes from new commits on `develop` during the
development of your feature (e.g. hotfixes), please also use `git merge` to
integrate them into your branch.
6. Request a review by one of the TaPaSCo maintainers ([jahofmann](https://github.com/jahofmann), [cahz](https://github.com/cahz), [sommerlukas](https://github.com/sommerlukas)).
We will review your changes, giving you feedback on your code.
7. When the review process is done, we will accept the pull request, merging
your changes into `develop`. From this moment on, your feature will be part
of TaPaSCo and you will have the honor of being a TaPaSCo contributor ;-)
When the next release occurs on `master`, your feature will automatically be part
of it.
If this process seems too complicated to you or you only have a small one-off
change to make, you can also [contact us](mailto:tapasco@esa.tu-darmstadt.de)
with a patch.
......@@ -3,7 +3,7 @@ The Task Parallel System Composer (TaPaSCo)
![Tapasco logo](icon/tapasco_icon.png)
Master Branch Status: [![pipeline status](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/badges/master/pipeline.svg)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/commits/master)
Dev Branch Status: [![pipeline status](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/badges/2018.2/pipeline.svg)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/commits/2018.2)
Dev Branch Status: [![pipeline status](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/badges/develop/pipeline.svg)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/commits/develop)
System Requirements
-------------------
......@@ -30,16 +30,16 @@ To use TaPaSCo, you'll need working installations of
* *OPTIONAL:* libncurses for the tapasco-debug application
* Ubuntu
```bash
apt-get -y update && apt-get -y install unzip git zip findutils curl build-essential \
sudo apt-get -y update && sudo apt-get -y install unzip git zip findutils curl build-essential \
linux-headers-generic python cmake libelf-dev libncurses-dev rpm
curl -s "https://get.sdkman.io" | bash
source "/root/.sdkman/bin/sdkman-init.sh"
source "$HOME/.sdkman/bin/sdkman-init.sh"
sdk install java
sdk install sbt
```
* Fedora
```bash
dnf -y install which unzip git zip tar findutils kernel-devel make gcc gcc-c++ \
sudo dnf -y install which unzip git zip tar findutils kernel-devel make gcc gcc-c++ \
elfutils-libelf-devel cmake ncurses-devel python libatomic rpm-build
curl -s "https://get.sdkman.io" | bash
source "$HOME/.sdkman/bin/sdkman-init.sh"
......
val tapascoVersion = "2018.2"
val tapascoVersion = "2019.6"
organization := "de.tu_darmstadt.esa.cs"
......
......@@ -86,7 +86,7 @@ namespace eval tapasco {
# Returns the Tapasco version.
proc get_tapasco_version {} {
return "2018.2"
return "2019.6"
}
# Returns the interface pin groups for all AXI MM interfaces on cell.
......
......@@ -4,3 +4,4 @@ dict set stdcomps system_ila vlnv "xilinx.com:ip:system_ila:1.1"
dict set stdcomps axi_pcie3_0_usp vlnv "xilinx.com:ip:xdma:4.1"
dict set stdcomps clk_wiz vlnv "xilinx.com:ip:clk_wiz:6.0"
dict set stdcomps mig_core vlnv "xilinx.com:ip:mig_7series:4.1"
dict set stdcomps ultra_ps vlnv "xilinx.com:ip:zynq_ultra_ps_e:3.2"
\ No newline at end of file
......@@ -4,3 +4,4 @@ dict set stdcomps system_ila vlnv "xilinx.com:ip:system_ila:1.1"
dict set stdcomps axi_pcie3_0_usp vlnv "xilinx.com:ip:xdma:4.1"
dict set stdcomps clk_wiz vlnv "xilinx.com:ip:clk_wiz:6.0"
dict set stdcomps mig_core vlnv "xilinx.com:ip:mig_7series:4.1"
dict set stdcomps ultra_ps vlnv "xilinx.com:ip:zynq_ultra_ps_e:3.2"
\ No newline at end of file
......@@ -4,3 +4,4 @@ dict set stdcomps system_ila vlnv "xilinx.com:ip:system_ila:1.1"
dict set stdcomps axi_pcie3_0_usp vlnv "xilinx.com:ip:xdma:4.1"
dict set stdcomps clk_wiz vlnv "xilinx.com:ip:clk_wiz:6.0"
dict set stdcomps mig_core vlnv "xilinx.com:ip:mig_7series:4.2"
dict set stdcomps ultra_ps vlnv "xilinx.com:ip:zynq_ultra_ps_e:3.2"
\ No newline at end of file
# create a dictionary of compatible VLNVs
source $::env(TAPASCO_HOME)/common/common_ip.tcl
dict set stdcomps system_ila vlnv "xilinx.com:ip:system_ila:1.1"
dict set stdcomps axi_pcie3_0_usp vlnv "xilinx.com:ip:xdma:4.1"
dict set stdcomps clk_wiz vlnv "xilinx.com:ip:clk_wiz:6.0"
dict set stdcomps mig_core vlnv "xilinx.com:ip:mig_7series:4.2"
dict set stdcomps ultra_ps vlnv "xilinx.com:ip:zynq_ultra_ps_e:3.3"
\ No newline at end of file
......@@ -111,10 +111,12 @@ if {[llength [info commands platform::generate_wrapper]] == 0} {
platform::generate_wrapper
}
# activate retiming in synthesis
set_property STEPS.SYNTH_DESIGN.ARGS.RETIMING true [get_runs synth_1]
# Disable OOC synthesis to avoid log file problems
set_property synth_checkpoint_mode None [get_files system.bd]
# Synthesis and P&R effort level
set effort_level "@@EFFORT_LEVEL@@"
# generate according to the mode
platform::generate
......
......@@ -190,14 +190,17 @@ report_timing_summary -quiet -datasheet -file @@REPORT_TIMING@@
# report utilization
report_utilization -quiet -file @@REPORT_UTILIZATION@@
# recalculate achieved frequency and set new period (for realistic power values)
set wns [tapasco::get_wns_from_timing_report @@REPORT_TIMING@@]
if {$wns < 0} {
create_clock -name clk -period [expr "$period - $wns"] $clock_ports
}
# report power
report_power -quiet -file @@REPORT_POWER@@
# extract AXI interfaces
# requires a block design
set bd [create_bd_design bd]
set pe [create_bd_cell pe -vlnv @@VLNV@@]
set interfaces_file [open @@REPORT_PORT@@ "w"]
puts @@REPORT_PORT@@
set axi_master_ports [tapasco::get_aximm_interfaces $pe "Master"]
set axi_slave_ports [tapasco::get_aximm_interfaces $pe "Slave"]
puts $interfaces_file "AXI_MASTER_PORTS\t[llength $axi_master_ports]"
puts $interfaces_file "AXI_SLAVE_PORTS\t[llength $axi_slave_ports]"
close $interfaces_file
# done!
exit
This diff is collapsed.
OPTION psf_version = 2.1;
BEGIN DRIVER GP_LED
OPTION supported_peripherals = (GP_LED);
OPTION copyfiles = all;
OPTION VERSION = 1.0;
OPTION NAME = GP_LED;
END DRIVER
proc generate {drv_handle} {
xdefine_include_file $drv_handle "xparameters.h" "GP_LED" "NUM_INSTANCES" "DEVICE_ID" "C_S00_AXI_BASEADDR" "C_S00_AXI_HIGHADDR"
}
/***************************** Include Files *******************************/
#include "GP_LED.h"
/************************** Function Definitions ***************************/
#ifndef GP_LED_H
#define GP_LED_H
/****************** Include Files ********************/
#include "xil_types.h"
#include "xstatus.h"
#define GP_LED_S00_AXI_SLV_REG0_OFFSET 0
#define GP_LED_S00_AXI_SLV_REG1_OFFSET 4
#define GP_LED_S00_AXI_SLV_REG2_OFFSET 8
#define GP_LED_S00_AXI_SLV_REG3_OFFSET 12
/**************************** Type Definitions *****************************/
/**
*
* Write a value to a GP_LED register. A 32 bit write is performed.
* If the component is implemented in a smaller width, only the least
* significant data is written.
*
* @param BaseAddress is the base address of the GP_LEDdevice.
* @param RegOffset is the register offset from the base to write to.
* @param Data is the data written to the register.
*
* @return None.
*
* @note
* C-style signature:
* void GP_LED_mWriteReg(u32 BaseAddress, unsigned RegOffset, u32 Data)
*
*/
#define GP_LED_mWriteReg(BaseAddress, RegOffset, Data) \
Xil_Out32((BaseAddress) + (RegOffset), (u32)(Data))
/**
*
* Read a value from a GP_LED register. A 32 bit read is performed.
* If the component is implemented in a smaller width, only the least
* significant data is read from the register. The most significant data
* will be read as 0.
*
* @param BaseAddress is the base address of the GP_LED device.
* @param RegOffset is the register offset from the base to write to.
*
* @return Data is the data from the register.
*
* @note
* C-style signature:
* u32 GP_LED_mReadReg(u32 BaseAddress, unsigned RegOffset)
*
*/
#define GP_LED_mReadReg(BaseAddress, RegOffset) \
Xil_In32((BaseAddress) + (RegOffset))
/************************** Function Prototypes ****************************/
/**
*
* Run a self-test on the driver/device. Note this may be a destructive test if
* resets of the device are performed.
*
* If the hardware system is not built correctly, this function may never
* return to the caller.
*
* @param baseaddr_p is the base address of the GP_LED instance to be worked on.
*
* @return
*
* - XST_SUCCESS if all self-test code passed
* - XST_FAILURE if any self-test code failed
*
* @note Caching must be turned off for this function to work.
* @note Self test may fail if data memory and device are not on the same bus.
*
*/
XStatus GP_LED_Reg_SelfTest(void * baseaddr_p);
#endif // GP_LED_H
/***************************** Include Files *******************************/
#include "GP_LED.h"
#include "xparameters.h"
#include "stdio.h"
#include "xil_io.h"
/************************** Constant Definitions ***************************/
#define READ_WRITE_MUL_FACTOR 0x10
/************************** Function Definitions ***************************/
/**
*
* Run a self-test on the driver/device. Note this may be a destructive test if
* resets of the device are performed.
*
* If the hardware system is not built correctly, this function may never
* return to the caller.
*
* @param baseaddr_p is the base address of the GP_LEDinstance to be worked on.
*
* @return
*
* - XST_SUCCESS if all self-test code passed
* - XST_FAILURE if any self-test code failed
*
* @note Caching must be turned off for this function to work.
* @note Self test may fail if data memory and device are not on the same bus.
*
*/
XStatus GP_LED_Reg_SelfTest(void * baseaddr_p)
{
u32 baseaddr;
int write_loop_index;
int read_loop_index;
int Index;
baseaddr = (u32) baseaddr_p;
xil_printf("******************************\n\r");
xil_printf("* User Peripheral Self Test\n\r");
xil_printf("******************************\n\n\r");
/*
* Write to user logic slave module register(s) and read back
*/
xil_printf("User logic slave module test...\n\r");
for (write_loop_index = 0 ; write_loop_index < 4; write_loop_index++)
GP_LED_mWriteReg (baseaddr, write_loop_index*4, (write_loop_index+1)*READ_WRITE_MUL_FACTOR);
for (read_loop_index = 0 ; read_loop_index < 4; read_loop_index++)
if ( GP_LED_mReadReg (baseaddr, read_loop_index*4) != (read_loop_index+1)*READ_WRITE_MUL_FACTOR){
xil_printf ("Error reading register value at address %x\n", (int)baseaddr + read_loop_index*4);
return XST_FAILURE;
}
xil_printf(" - slave register write/read passed\n\n\r");
return XST_SUCCESS;
}
COMPILER=
ARCHIVER=
CP=cp
COMPILER_FLAGS=
EXTRA_COMPILER_FLAGS=
LIB=libxil.a
RELEASEDIR=../../../lib
INCLUDEDIR=../../../include
INCLUDES=-I./. -I${INCLUDEDIR}
INCLUDEFILES=*.h
LIBSOURCES=*.c
OUTS = *.o
libs:
echo "Compiling GP_LED..."
$(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $(LIBSOURCES)
$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OUTS}
make clean
include:
${CP} $(INCLUDEFILES) $(INCLUDEDIR)
clean:
rm -rf ${OUTS}
//
// Copyright (C) 2014 David de la Chevallerie, TU Darmstadt
//
// This file is part of Tapasco (TPC).
//
// Tapasco is free software: you can redistribute it and/or modify
// it under the terms of the GNU Lesser General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// Tapasco is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU Lesser General Public License for more details.
//
// You should have received a copy of the GNU Lesser General Public License
// along with Tapasco. If not, see <http://www.gnu.org/licenses/>.
//
`timescale 1 ns / 1 ps
`include "GP_LED_v1_0_tb_include.vh"
// lite_response Type Defines
`define RESPONSE_OKAY 2'b00
`define RESPONSE_EXOKAY 2'b01
`define RESP_BUS_WIDTH 2
`define BURST_TYPE_INCR 2'b01
`define BURST_TYPE_WRAP 2'b10
module GP_LED_v1_0_tb;
reg tb_ACLK;
reg tb_ARESETn;
reg tb_IN_0;
reg tb_IN_1;
reg tb_IN_2;
reg tb_IN_3;
reg tb_IN_4;
reg tb_IN_5;
wire [7:0] tb_LED_Port;
// Create an instance of the example tb
`BD_WRAPPER dut ( .ACLK(tb_ACLK),
.ARESETN(tb_ARESETn),
.IN_0(tb_IN_0),
.IN_1(tb_IN_1),
.IN_2(tb_IN_2),
.IN_3(tb_IN_3),
.IN_4(tb_IN_4),
.IN_5(tb_IN_5),
.LED_Port(tb_LED_Port)
);
// Local Variables
// Simple Reset Generator and test
initial begin
tb_ARESETn = 1'b0;
#500;
// Release the reset on the posedge of the clk.
@(posedge tb_ACLK);
tb_ARESETn = 1'b1;
@(posedge tb_ACLK);
end
// Simple Clock Generator
initial tb_ACLK = 1'b0;
always #10 tb_ACLK = !tb_ACLK;
// Create the test vectors
initial begin
// When performing debug enable all levels of INFO messages.
wait(tb_ARESETn === 0) @(posedge tb_ACLK);
wait(tb_ARESETn === 1) @(posedge tb_ACLK);
wait(tb_ARESETn === 1) @(posedge tb_ACLK);
wait(tb_ARESETn === 1) @(posedge tb_ACLK);
wait(tb_ARESETn === 1) @(posedge tb_ACLK);
// Create test data vectors
end
// Drive the BFM
initial begin
// Wait for end of reset
wait(tb_ARESETn === 0) @(posedge tb_ACLK);
wait(tb_ARESETn === 1) @(posedge tb_ACLK);
wait(tb_ARESETn === 1) @(posedge tb_ACLK);
wait(tb_ARESETn === 1) @(posedge tb_ACLK);
wait(tb_ARESETn === 1) @(posedge tb_ACLK);
#100;
tb_IN_0 = 1'b1;
tb_IN_1 = 1'b1;
tb_IN_2 = 1'b1;
tb_IN_3 = 1'b1;
tb_IN_4 = 1'b1;
tb_IN_5 = 1'b1;
#100;
tb_IN_0 = 1'b0;
tb_IN_1 = 1'b1;
tb_IN_2 = 1'b0;
tb_IN_3 = 1'b1;
tb_IN_4 = 1'b0;
tb_IN_5 = 1'b1;
end
endmodule
#
# Copyright (C) 2014 David de la Chevallerie, TU Darmstadt
#
# This file is part of Tapasco (TPC).
#
# Tapasco is free software: you can redistribute it and/or modify
# it under the terms of the GNU Lesser General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# Tapasco is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU Lesser General Public License for more details.
#
# You should have received a copy of the GNU Lesser General Public License
# along with Tapasco. If not, see <http://www.gnu.org/licenses/>.
#
proc create_ipi_design { offsetfile design_name } {
create_bd_design $design_name
open_bd_design $design_name
# Create Clock and Reset Ports
set ACLK [ create_bd_port -dir I -type clk ACLK ]
set_property -dict [ list CONFIG.FREQ_HZ {100000000} CONFIG.PHASE {0.000} CONFIG.CLK_DOMAIN "${design_name}_ACLK" ] $ACLK
set ARESETN [ create_bd_port -dir I -type rst ARESETN ]
set_property -dict [ list CONFIG.POLARITY {ACTIVE_LOW} ] $ARESETN
set_property CONFIG.ASSOCIATED_RESET ARESETN $ACLK
set IN_0 [ create_bd_port -dir I IN_0 ]
set IN_1 [ create_bd_port -dir I IN_1 ]
set IN_2 [ create_bd_port -dir I IN_2 ]
set IN_3 [ create_bd_port -dir I IN_3 ]
set IN_4 [ create_bd_port -dir I IN_4 ]
set IN_5 [ create_bd_port -dir I IN_5 ]
set LED_Port [ create_bd_port -dir O -from 7 -to 0 LED_Port ]
# Create instance: GP_LED_0, and set properties
set GP_LED_0 [ create_bd_cell -type ip -vlnv ESA:user:GP_LED:1.0 GP_LED_0]
# Create port connections
connect_bd_net -net aclk_net [get_bd_ports ACLK] [get_bd_pins GP_LED_0/aclk]
connect_bd_net -net aresetn_net [get_bd_ports ARESETN] [get_bd_pins GP_LED_0/aresetn]
connect_bd_net -net in_0_net [get_bd_ports IN_0] [get_bd_pins GP_LED_0/IN_0]
connect_bd_net -net in_1_net [get_bd_ports IN_1] [get_bd_pins GP_LED_0/IN_1]
connect_bd_net -net in_2_net [get_bd_ports IN_2] [get_bd_pins GP_LED_0/IN_2]
connect_bd_net -net in_3_net [get_bd_ports IN_3] [get_bd_pins GP_LED_0/IN_3]
connect_bd_net -net in_4_net [get_bd_ports IN_4] [get_bd_pins GP_LED_0/IN_4]
connect_bd_net -net in_5_net [get_bd_ports IN_5] [get_bd_pins GP_LED_0/IN_5]
connect_bd_net -net led_port_net [get_bd_ports LED_Port] [get_bd_pins GP_LED_0/LED_Port]
# Copy all address to interface_address.vh file
set bd_path [file dirname [get_property NAME [get_files ${design_name}.bd]]]
upvar 1 $offsetfile offset_file
set offset_file "${bd_path}/GP_LED_v1_0_tb_include.vh"
set fp [open $offset_file "w"]
puts $fp "`ifndef GP_LED_v1_0_tb_include_vh_"
puts $fp "`define GP_LED_v1_0_tb_include_vh_\n"
puts $fp "//Configuration current bd names"
puts $fp "`define BD_INST_NAME ${design_name}_i"
puts $fp "`define BD_WRAPPER ${design_name}_wrapper\n"
puts $fp "//Configuration address parameters"
#set offset [get_property OFFSET [get_bd_addr_segs -of_objects [get_bd_addr_spaces master_0/Data_lite]]]
set offset "12340000"
set offset_hex [string replace $offset 0 1 "32'h"]
puts $fp "`define S00_AXI_SLAVE_ADDRESS ${offset_hex}"
puts $fp "`endif"
close $fp
}