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Commit 6e310f30 authored by Carsten Heinz's avatar Carsten Heinz Committed by Jaco A. Hofmann
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Restructure LED feature 

* merge version of PYNQ and vc709
* provide plugin in platform/common/plugins
* define properties/constraints for each platform
parent 4ad2521b
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            common/ip/GP_LED_1.0/component.xml deleted 100644 → 0
            View file @ 4ad2521b
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            common/ip/GP_LED_1.0/drivers/GP_LED_v1_0/data/GP_LED.mdd deleted 100644 → 0
            View file @ 4ad2521b
            OPTION psf_version = 2.1;
            BEGIN DRIVER GP_LED
            OPTION supported_peripherals = (GP_LED);
            OPTION copyfiles = all;
            OPTION VERSION = 1.0;
            OPTION NAME = GP_LED;
            END DRIVER
            common/ip/GP_LED_1.0/drivers/GP_LED_v1_0/data/GP_LED.tcl deleted 100644 → 0
            View file @ 4ad2521b
            proc generate {drv_handle} {
            xdefine_include_file $drv_handle "xparameters.h" "GP_LED" "NUM_INSTANCES" "DEVICE_ID" "C_S00_AXI_BASEADDR" "C_S00_AXI_HIGHADDR"
            }
            common/ip/GP_LED_1.0/drivers/GP_LED_v1_0/src/GP_LED.c deleted 100644 → 0
            View file @ 4ad2521b
            /***************************** Include Files *******************************/
            #include "GP_LED.h"
            /************************** Function Definitions ***************************/
            common/ip/GP_LED_1.0/drivers/GP_LED_v1_0/src/GP_LED.h deleted 100644 → 0
            View file @ 4ad2521b
            #ifndef GP_LED_H
            #define GP_LED_H
            /****************** Include Files ********************/
            #include "xil_types.h"
            #include "xstatus.h"
            #define GP_LED_S00_AXI_SLV_REG0_OFFSET 0
            #define GP_LED_S00_AXI_SLV_REG1_OFFSET 4
            #define GP_LED_S00_AXI_SLV_REG2_OFFSET 8
            #define GP_LED_S00_AXI_SLV_REG3_OFFSET 12
            /**************************** Type Definitions *****************************/
            /**
            *
            * Write a value to a GP_LED register. A 32 bit write is performed.
            * If the component is implemented in a smaller width, only the least
            * significant data is written.
            *
            * @param BaseAddress is the base address of the GP_LEDdevice.
            * @param RegOffset is the register offset from the base to write to.
            * @param Data is the data written to the register.
            *
            * @return None.
            *
            * @note
            * C-style signature:
            * void GP_LED_mWriteReg(u32 BaseAddress, unsigned RegOffset, u32 Data)
            *
            */
            #define GP_LED_mWriteReg(BaseAddress, RegOffset, Data) \
            Xil_Out32((BaseAddress) + (RegOffset), (u32)(Data))
            /**
            *
            * Read a value from a GP_LED register. A 32 bit read is performed.
            * If the component is implemented in a smaller width, only the least
            * significant data is read from the register. The most significant data
            * will be read as 0.
            *
            * @param BaseAddress is the base address of the GP_LED device.
            * @param RegOffset is the register offset from the base to write to.
            *
            * @return Data is the data from the register.
            *
            * @note
            * C-style signature:
            * u32 GP_LED_mReadReg(u32 BaseAddress, unsigned RegOffset)
            *
            */
            #define GP_LED_mReadReg(BaseAddress, RegOffset) \
            Xil_In32((BaseAddress) + (RegOffset))
            /************************** Function Prototypes ****************************/
            /**
            *
            * Run a self-test on the driver/device. Note this may be a destructive test if
            * resets of the device are performed.
            *
            * If the hardware system is not built correctly, this function may never
            * return to the caller.
            *
            * @param baseaddr_p is the base address of the GP_LED instance to be worked on.
            *
            * @return
            *
            * - XST_SUCCESS if all self-test code passed
            * - XST_FAILURE if any self-test code failed
            *
            * @note Caching must be turned off for this function to work.
            * @note Self test may fail if data memory and device are not on the same bus.
            *
            */
            XStatus GP_LED_Reg_SelfTest(void * baseaddr_p);
            #endif // GP_LED_H
            common/ip/GP_LED_1.0/drivers/GP_LED_v1_0/src/GP_LED_selftest.c deleted 100644 → 0
            View file @ 4ad2521b
            /***************************** Include Files *******************************/
            #include "GP_LED.h"
            #include "xparameters.h"
            #include "stdio.h"
            #include "xil_io.h"
            /************************** Constant Definitions ***************************/
            #define READ_WRITE_MUL_FACTOR 0x10
            /************************** Function Definitions ***************************/
            /**
            *
            * Run a self-test on the driver/device. Note this may be a destructive test if
            * resets of the device are performed.
            *
            * If the hardware system is not built correctly, this function may never
            * return to the caller.
            *
            * @param baseaddr_p is the base address of the GP_LEDinstance to be worked on.
            *
            * @return
            *
            * - XST_SUCCESS if all self-test code passed
            * - XST_FAILURE if any self-test code failed
            *
            * @note Caching must be turned off for this function to work.
            * @note Self test may fail if data memory and device are not on the same bus.
            *
            */
            XStatus GP_LED_Reg_SelfTest(void * baseaddr_p)
            {
            u32 baseaddr;
            int write_loop_index;
            int read_loop_index;
            int Index;
            baseaddr = (u32) baseaddr_p;
            xil_printf("******************************\n\r");
            xil_printf("* User Peripheral Self Test\n\r");
            xil_printf("******************************\n\n\r");
            /*
            * Write to user logic slave module register(s) and read back
            */
            xil_printf("User logic slave module test...\n\r");
            for (write_loop_index = 0 ; write_loop_index < 4; write_loop_index++)
            GP_LED_mWriteReg (baseaddr, write_loop_index*4, (write_loop_index+1)*READ_WRITE_MUL_FACTOR);
            for (read_loop_index = 0 ; read_loop_index < 4; read_loop_index++)
            if ( GP_LED_mReadReg (baseaddr, read_loop_index*4) != (read_loop_index+1)*READ_WRITE_MUL_FACTOR){
            xil_printf ("Error reading register value at address %x\n", (int)baseaddr + read_loop_index*4);
            return XST_FAILURE;
            }
            xil_printf(" - slave register write/read passed\n\n\r");
            return XST_SUCCESS;
            }
            common/ip/GP_LED_1.0/drivers/GP_LED_v1_0/src/Makefile deleted 100644 → 0
            View file @ 4ad2521b
            COMPILER=
            ARCHIVER=
            CP=cp
            COMPILER_FLAGS=
            EXTRA_COMPILER_FLAGS=
            LIB=libxil.a
            RELEASEDIR=../../../lib
            INCLUDEDIR=../../../include
            INCLUDES=-I./. -I${INCLUDEDIR}
            INCLUDEFILES=*.h
            LIBSOURCES=*.c
            OUTS = *.o
            libs:
            echo "Compiling GP_LED..."
            $(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $(LIBSOURCES)
            $(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OUTS}
            make clean
            include:
            ${CP} $(INCLUDEFILES) $(INCLUDEDIR)
            clean:
            rm -rf ${OUTS}
            common/ip/GP_LED_1.0/example_designs/bfm_design/GP_LED_v1_0_tb.v deleted 100644 → 0
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            //
            // Copyright (C) 2014 David de la Chevallerie, TU Darmstadt
            //
            // This file is part of Tapasco (TPC).
            //
            // Tapasco is free software: you can redistribute it and/or modify
            // it under the terms of the GNU Lesser General Public License as published by
            // the Free Software Foundation, either version 3 of the License, or
            // (at your option) any later version.
            //
            // Tapasco is distributed in the hope that it will be useful,
            // but WITHOUT ANY WARRANTY; without even the implied warranty of
            // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
            // GNU Lesser General Public License for more details.
            //
            // You should have received a copy of the GNU Lesser General Public License
            // along with Tapasco. If not, see <http://www.gnu.org/licenses/>.
            //
            `timescale 1 ns / 1 ps
            `include "GP_LED_v1_0_tb_include.vh"
            // lite_response Type Defines
            `define RESPONSE_OKAY 2'b00
            `define RESPONSE_EXOKAY 2'b01
            `define RESP_BUS_WIDTH 2
            `define BURST_TYPE_INCR 2'b01
            `define BURST_TYPE_WRAP 2'b10
            module GP_LED_v1_0_tb;
            reg tb_ACLK;
            reg tb_ARESETn;
            reg tb_IN_0;
            reg tb_IN_1;
            reg tb_IN_2;
            reg tb_IN_3;
            reg tb_IN_4;
            reg tb_IN_5;
            wire [7:0] tb_LED_Port;
            // Create an instance of the example tb
            `BD_WRAPPER dut ( .ACLK(tb_ACLK),
            .ARESETN(tb_ARESETn),
            .IN_0(tb_IN_0),
            .IN_1(tb_IN_1),
            .IN_2(tb_IN_2),
            .IN_3(tb_IN_3),
            .IN_4(tb_IN_4),
            .IN_5(tb_IN_5),
            .LED_Port(tb_LED_Port)
            );
            // Local Variables
            // Simple Reset Generator and test
            initial begin
            tb_ARESETn = 1'b0;
            #500;
            // Release the reset on the posedge of the clk.
            @(posedge tb_ACLK);
            tb_ARESETn = 1'b1;
            @(posedge tb_ACLK);
            end
            // Simple Clock Generator
            initial tb_ACLK = 1'b0;
            always #10 tb_ACLK = !tb_ACLK;
            // Create the test vectors
            initial begin
            // When performing debug enable all levels of INFO messages.
            wait(tb_ARESETn === 0) @(posedge tb_ACLK);
            wait(tb_ARESETn === 1) @(posedge tb_ACLK);
            wait(tb_ARESETn === 1) @(posedge tb_ACLK);
            wait(tb_ARESETn === 1) @(posedge tb_ACLK);
            wait(tb_ARESETn === 1) @(posedge tb_ACLK);
            // Create test data vectors
            end
            // Drive the BFM
            initial begin
            // Wait for end of reset
            wait(tb_ARESETn === 0) @(posedge tb_ACLK);
            wait(tb_ARESETn === 1) @(posedge tb_ACLK);
            wait(tb_ARESETn === 1) @(posedge tb_ACLK);
            wait(tb_ARESETn === 1) @(posedge tb_ACLK);
            wait(tb_ARESETn === 1) @(posedge tb_ACLK);
            #100;
            tb_IN_0 = 1'b1;
            tb_IN_1 = 1'b1;
            tb_IN_2 = 1'b1;
            tb_IN_3 = 1'b1;
            tb_IN_4 = 1'b1;
            tb_IN_5 = 1'b1;
            #100;
            tb_IN_0 = 1'b0;
            tb_IN_1 = 1'b1;
            tb_IN_2 = 1'b0;
            tb_IN_3 = 1'b1;
            tb_IN_4 = 1'b0;
            tb_IN_5 = 1'b1;
            end
            endmodule
            common/ip/GP_LED_1.0/example_designs/bfm_design/design.tcl deleted 100644 → 0
            View file @ 4ad2521b
            #
            # Copyright (C) 2014 David de la Chevallerie, TU Darmstadt
            #
            # This file is part of Tapasco (TPC).
            #
            # Tapasco is free software: you can redistribute it and/or modify
            # it under the terms of the GNU Lesser General Public License as published by
            # the Free Software Foundation, either version 3 of the License, or
            # (at your option) any later version.
            #
            # Tapasco is distributed in the hope that it will be useful,
            # but WITHOUT ANY WARRANTY; without even the implied warranty of
            # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
            # GNU Lesser General Public License for more details.
            #
            # You should have received a copy of the GNU Lesser General Public License
            # along with Tapasco. If not, see <http://www.gnu.org/licenses/>.
            #
            proc create_ipi_design { offsetfile design_name } {
            create_bd_design $design_name
            open_bd_design $design_name
            # Create Clock and Reset Ports
            set ACLK [ create_bd_port -dir I -type clk ACLK ]
            set_property -dict [ list CONFIG.FREQ_HZ {100000000} CONFIG.PHASE {0.000} CONFIG.CLK_DOMAIN "${design_name}_ACLK" ] $ACLK
            set ARESETN [ create_bd_port -dir I -type rst ARESETN ]
            set_property -dict [ list CONFIG.POLARITY {ACTIVE_LOW} ] $ARESETN
            set_property CONFIG.ASSOCIATED_RESET ARESETN $ACLK
            set IN_0 [ create_bd_port -dir I IN_0 ]
            set IN_1 [ create_bd_port -dir I IN_1 ]
            set IN_2 [ create_bd_port -dir I IN_2 ]
            set IN_3 [ create_bd_port -dir I IN_3 ]
            set IN_4 [ create_bd_port -dir I IN_4 ]
            set IN_5 [ create_bd_port -dir I IN_5 ]
            set LED_Port [ create_bd_port -dir O -from 7 -to 0 LED_Port ]
            # Create instance: GP_LED_0, and set properties
            set GP_LED_0 [ create_bd_cell -type ip -vlnv ESA:user:GP_LED:1.0 GP_LED_0]
            # Create port connections
            connect_bd_net -net aclk_net [get_bd_ports ACLK] [get_bd_pins GP_LED_0/aclk]
            connect_bd_net -net aresetn_net [get_bd_ports ARESETN] [get_bd_pins GP_LED_0/aresetn]
            connect_bd_net -net in_0_net [get_bd_ports IN_0] [get_bd_pins GP_LED_0/IN_0]
            connect_bd_net -net in_1_net [get_bd_ports IN_1] [get_bd_pins GP_LED_0/IN_1]
            connect_bd_net -net in_2_net [get_bd_ports IN_2] [get_bd_pins GP_LED_0/IN_2]
            connect_bd_net -net in_3_net [get_bd_ports IN_3] [get_bd_pins GP_LED_0/IN_3]
            connect_bd_net -net in_4_net [get_bd_ports IN_4] [get_bd_pins GP_LED_0/IN_4]
            connect_bd_net -net in_5_net [get_bd_ports IN_5] [get_bd_pins GP_LED_0/IN_5]
            connect_bd_net -net led_port_net [get_bd_ports LED_Port] [get_bd_pins GP_LED_0/LED_Port]
            # Copy all address to interface_address.vh file
            set bd_path [file dirname [get_property NAME [get_files ${design_name}.bd]]]
            upvar 1 $offsetfile offset_file
            set offset_file "${bd_path}/GP_LED_v1_0_tb_include.vh"
            set fp [open $offset_file "w"]
            puts $fp "`ifndef GP_LED_v1_0_tb_include_vh_"
            puts $fp "`define GP_LED_v1_0_tb_include_vh_\n"
            puts $fp "//Configuration current bd names"
            puts $fp "`define BD_INST_NAME ${design_name}_i"
            puts $fp "`define BD_WRAPPER ${design_name}_wrapper\n"
            puts $fp "//Configuration address parameters"
            #set offset [get_property OFFSET [get_bd_addr_segs -of_objects [get_bd_addr_spaces master_0/Data_lite]]]
            set offset "12340000"
            set offset_hex [string replace $offset 0 1 "32'h"]
            puts $fp "`define S00_AXI_SLAVE_ADDRESS ${offset_hex}"
            puts $fp "`endif"
            close $fp
            }
            set ip_path [file dirname [file normalize [get_property XML_FILE_NAME [ipx::get_cores ESA:user:GP_LED:1.0]]]]
            set test_bench_file ${ip_path}/example_designs/bfm_design/GP_LED_v1_0_tb.v
            set interface_address_vh_file ""
            # Set IP Repository and Update IP Catalogue
            set repo_paths [get_property ip_repo_paths [current_fileset]]
            if { [lsearch -exact -nocase $repo_paths $ip_path ] == -1 } {
            set_property ip_repo_paths "$ip_path [get_property ip_repo_paths [current_fileset]]" [current_fileset]
            update_ip_catalog
            }
            set design_name ""
            set all_bd {}
            set all_bd_files [get_files *.bd -quiet]
            foreach file $all_bd_files {
            set file_name [string range $file [expr {[string last "/" $file] + 1}] end]
            set bd_name [string range $file_name 0 [expr {[string last "." $file_name] -1}]]
            lappend all_bd $bd_name
            }
            for { set i 1 } { 1 } { incr i } {
            set design_name "GP_LED_v1_0_bfm_${i}"
            if { [lsearch -exact -nocase $all_bd $design_name ] == -1 } {
            break
            }
            }
            create_ipi_design interface_address_vh_file ${design_name}
            validate_bd_design
            set wrapper_file [make_wrapper -files [get_files ${design_name}.bd] -top -force]
            import_files -force -norecurse $wrapper_file
            set_property SOURCE_SET sources_1 [get_filesets sim_1]
            import_files -fileset sim_1 -norecurse -force $test_bench_file
            remove_files -quiet -fileset sim_1 GP_LED_v1_0_tb_include.vh
            import_files -fileset sim_1 -norecurse -force $interface_address_vh_file
            set_property top GP_LED_v1_0_tb [get_filesets sim_1]
            set_property top_lib {} [get_filesets sim_1]
            set_property top_file {} [get_filesets sim_1]
            launch_xsim -simset sim_1 -mode behavioral
            restart
            run 1000 us
            common/ip/GP_LED_1.0/example_designs/debug_hw_design/GP_LED_v1_0_hw_test.tcl deleted 100644 → 0
            View file @ 4ad2521b
            #
            # Copyright (C) 2014 David de la Chevallerie, TU Darmstadt
            #
            # This file is part of Tapasco (TPC).
            #
            # Tapasco is free software: you can redistribute it and/or modify
            # it under the terms of the GNU Lesser General Public License as published by
            # the Free Software Foundation, either version 3 of the License, or
            # (at your option) any later version.
            #
            # Tapasco is distributed in the hope that it will be useful,
            # but WITHOUT ANY WARRANTY; without even the implied warranty of
            # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
            # GNU Lesser General Public License for more details.
            #
            # You should have received a copy of the GNU Lesser General Public License
            # along with Tapasco. If not, see <http://www.gnu.org/licenses/>.
            #
            # Runtime Tcl commands to interact with - GP_LED_v1_0
            # Sourcing design address info tcl
            set bd_path [get_property DIRECTORY [current_project]]/[current_project].srcs/[current_fileset]/bd
            source ${bd_path}/GP_LED_v1_0_include.tcl
            # jtag axi master interface hardware name, change as per your design.
            set jtag_axi_master hw_axi_1
            set ec 0
            # hw test script
            # Delete all previous axis transactions
            if { [llength [get_hw_axi_txns -quiet]] } {
            delete_hw_axi_txn [get_hw_axi_txns -quiet]
            }
            # Test all lite slaves.
            set wdata_1 abcd1234
            # Test: S00_AXI
            # Create a write transaction at s00_axi_addr address
            create_hw_axi_txn w_s00_axi_addr [get_hw_axis $jtag_axi_master] -type write -address $s00_axi_addr -data $wdata_1
            # Create a read transaction at s00_axi_addr address
            create_hw_axi_txn r_s00_axi_addr [get_hw_axis $jtag_axi_master] -type read -address $s00_axi_addr
            # Initiate transactions
            run_hw_axi r_s00_axi_addr
            run_hw_axi w_s00_axi_addr
            run_hw_axi r_s00_axi_addr
            set rdata_tmp [get_property DATA [get_hw_axi_txn r_s00_axi_addr]]
            # Compare read data
            if { $rdata_tmp == $wdata_1 } {
            puts "Data comparison test pass for - S00_AXI"
            } else {
            puts "Data comparison test fail for - S00_AXI, expected-$wdata_1 actual-$rdata_tmp"
            inc ec
            }
            # Check error flag
            if { $ec == 0 } {
            puts "PTGEN_TEST: PASSED!"
            } else {
            puts "PTGEN_TEST: FAILED!"
            }
            common/ip/GP_LED_1.0/example_designs/debug_hw_design/design.tcl deleted 100644 → 0
            View file @ 4ad2521b
            #
            # Copyright (C) 2014 David de la Chevallerie, TU Darmstadt
            #
            # This file is part of Tapasco (TPC).
            #
            # Tapasco is free software: you can redistribute it and/or modify
            # it under the terms of the GNU Lesser General Public License as published by
            # the Free Software Foundation, either version 3 of the License, or
            # (at your option) any later version.
            #
            # Tapasco is distributed in the hope that it will be useful,
            # but WITHOUT ANY WARRANTY; without even the implied warranty of
            # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
            # GNU Lesser General Public License for more details.
            #
            # You should have received a copy of the GNU Lesser General Public License
            # along with Tapasco. If not, see <http://www.gnu.org/licenses/>.
            #
            proc create_ipi_design { offsetfile design_name } {
            create_bd_design $design_name
            open_bd_design $design_name
            # Create and configure Clock/Reset
            create_bd_cell -type ip -vlnv xilinx.com:ip:clk_wiz sys_clk_0
            create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset sys_reset_0
            #check if current_board is set, if true - figure out required clocks.
            set is_board_clock_found 0
            set is_board_reset_found 0
            set external_reset_port ""
            set external_clock_port ""
            if { [current_board_part -quiet] != "" } {
            #check if any reset interface exists in board.
            set board_reset [lindex [get_board_part_interfaces -filter { BUSDEF_NAME == reset_rtl && MODE == slave }] 0 ]
            if { $board_reset ne "" } {
            set is_board_reset_found 1
            apply_board_connection -board_interface $board_reset -ip_intf sys_clk_0/reset -diagram [current_bd_design]
            apply_board_connection -board_interface $board_reset -ip_intf sys_reset_0/ext_reset -diagram [current_bd_design]
            set external_rst [get_bd_ports -quiet -of_objects [get_bd_nets -quiet -of_objects [get_bd_pins -quiet sys_clk_0/reset]]]
            if { $external_rst ne "" } {
            set external_reset_port [get_property NAME $external_rst]
            }
            } else {
            send_msg "ptgen 51-200" WARNING "No reset interface found in current_board, Users may need to specify the location constraints manually."
            }
            # check for differential clock, exclude any special clocks which has TYPE property.
            set board_clock_busifs ""
            foreach busif [get_board_part_interfaces -filter "BUSDEF_NAME == diff_clock_rtl"] {
            set type [get_property PARAM.TYPE $busif]
            if { $type == "" } {
            set board_clock_busifs $busif
            break
            }
            }
            if { $board_clock_busifs ne "" } {
            apply_board_connection -board_interface $board_clock_busifs -ip_intf sys_clk_0/CLK_IN1_D -diagram [current_bd_design]
            set is_board_clock_found 1
            } else {
            # check for single ended clock
            set board_sclock_busifs [lindex [get_board_part_interfaces -filter "BUSDEF_NAME == clock_rtl"] 0 ]
            if { $board_sclock_busifs ne "" } {
            apply_board_connection -board_interface $board_sclock_busifs -ip_intf sys_clk_0/clock_CLK_IN1 -diagram [current_bd_design]
            set external_clk [get_bd_ports -quiet -of_objects [get_bd_nets -quiet -of_objects [get_bd_pins -quiet sys_clk_0/clk_in1]]]
            if { $external_clk ne "" } {
            set external_clock_port [get_property NAME $external_clk]
            }
            set is_board_clock_found 1
            } else {
            send_msg "ptgen 51-200" WARNING "No clock interface found in current_board, Users may need to specify the location constraints manually."
            }
            }
            } else {
            send_msg "ptgen 51-201" WARNING "No board selected in current_project. Users may need to specify the location constraints manually."
            }
            #if there is no corresponding board interface found, assume constraints will be provided manually while pin planning.
            if { $is_board_reset_found == 0 } {
            create_bd_port -dir I -type rst reset_rtl
            set_property CONFIG.POLARITY [get_property CONFIG.POLARITY [get_bd_pins sys_clk_0/reset]] [get_bd_ports reset_rtl]
            connect_bd_net [get_bd_pins sys_reset_0/ext_reset_in] [get_bd_ports reset_rtl]
            connect_bd_net [get_bd_ports reset_rtl] [get_bd_pins sys_clk_0/reset]
            set external_reset_port reset_rtl
            }
            if { $is_board_clock_found == 0 } {
            create_bd_port -dir I -type clk clock_rtl
            connect_bd_net [get_bd_pins sys_clk_0/clk_in1] [get_bd_ports clock_rtl]
            set external_clock_port clock_rtl
            }
            #Avoid IPI DRC, make clock port synchronous to reset
            if { $external_clock_port ne "" && $external_reset_port ne "" } {
            set_property CONFIG.ASSOCIATED_RESET $external_reset_port [get_bd_ports $external_clock_port]
            }
            # Connect other sys_reset pins
            connect_bd_net [get_bd_pins sys_reset_0/slowest_sync_clk] [get_bd_pins sys_clk_0/clk_out1]
            connect_bd_net [get_bd_pins sys_clk_0/locked] [get_bd_pins sys_reset_0/dcm_locked]
            # Create instance: GP_LED_0, and set properties
            set GP_LED_0 [ create_bd_cell -type ip -vlnv ESA:user:GP_LED:1.0 GP_LED_0 ]
            # Create instance: jtag_axi_0, and set properties
            set jtag_axi_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:jtag_axi jtag_axi_0 ]
            set_property -dict [list CONFIG.PROTOCOL {0}] [get_bd_cells jtag_axi_0]
            connect_bd_net [get_bd_pins jtag_axi_0/aclk] [get_bd_pins sys_clk_0/clk_out1]
            connect_bd_net [get_bd_pins jtag_axi_0/aresetn] [get_bd_pins sys_reset_0/peripheral_aresetn]
            # Create instance: axi_peri_interconnect, and set properties
            set axi_peri_interconnect [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect axi_peri_interconnect ]
            connect_bd_net [get_bd_pins axi_peri_interconnect/ACLK] [get_bd_pins sys_clk_0/clk_out1]
            connect_bd_net [get_bd_pins axi_peri_interconnect/ARESETN] [get_bd_pins sys_reset_0/interconnect_aresetn]
            set_property -dict [ list CONFIG.NUM_SI {1} ] $axi_peri_interconnect
            connect_bd_net [get_bd_pins axi_peri_interconnect/S00_ACLK] [get_bd_pins sys_clk_0/clk_out1]
            connect_bd_net [get_bd_pins axi_peri_interconnect/S00_ARESETN] [get_bd_pins sys_reset_0/peripheral_aresetn]
            connect_bd_intf_net [get_bd_intf_pins jtag_axi_0/M_AXI] [get_bd_intf_pins axi_peri_interconnect/S00_AXI]
            set_property -dict [ list CONFIG.NUM_MI {1} ] $axi_peri_interconnect
            connect_bd_net [get_bd_pins axi_peri_interconnect/M00_ACLK] [get_bd_pins sys_clk_0/clk_out1]
            connect_bd_net [get_bd_pins axi_peri_interconnect/M00_ARESETN] [get_bd_pins sys_reset_0/peripheral_aresetn]
            # Connect all clock & reset of GP_LED_0 slave interfaces..
            connect_bd_intf_net [get_bd_intf_pins axi_peri_interconnect/M00_AXI] [get_bd_intf_pins GP_LED_0/S00_AXI]
            connect_bd_net [get_bd_pins GP_LED_0/s00_axi_aclk] [get_bd_pins sys_clk_0/clk_out1]
            connect_bd_net [get_bd_pins GP_LED_0/s00_axi_aresetn] [get_bd_pins sys_reset_0/peripheral_aresetn]
            # Auto assign address
            assign_bd_address
            # Copy all address to GP_LED_v1_0_include.tcl file
            set bd_path [get_property DIRECTORY [current_project]]/[current_project].srcs/[current_fileset]/bd
            upvar 1 $offsetfile offset_file
            set offset_file "${bd_path}/GP_LED_v1_0_include.tcl"
            set fp [open $offset_file "w"]
            puts $fp "# Configuration address parameters"
            set offset [get_property OFFSET [get_bd_addr_segs /jtag_axi_0/Data/SEG_GP_LED_0_S00_AXI_* ]]
            puts $fp "set s00_axi_addr ${offset}"
            close $fp
            }
            # Set IP Repository and Update IP Catalogue
            set ip_path [file dirname [file normalize [get_property XML_FILE_NAME [ipx::get_cores ESA:user:GP_LED:1.0]]]]
            set hw_test_file ${ip_path}/example_designs/debug_hw_design/GP_LED_v1_0_hw_test.tcl
            set repo_paths [get_property ip_repo_paths [current_fileset]]
            if { [lsearch -exact -nocase $repo_paths $ip_path ] == -1 } {
            set_property ip_repo_paths "$ip_path [get_property ip_repo_paths [current_fileset]]" [current_fileset]
            update_ip_catalog
            }
            set design_name ""
            set all_bd {}
            set all_bd_files [get_files *.bd -quiet]
            foreach file $all_bd_files {
            set file_name [string range $file [expr {[string last "/" $file] + 1}] end]
            set bd_name [string range $file_name 0 [expr {[string last "." $file_name] -1}]]
            lappend all_bd $bd_name
            }
            for { set i 1 } { 1 } { incr i } {
            set design_name "GP_LED_v1_0_hw_${i}"
            if { [lsearch -exact -nocase $all_bd $design_name ] == -1 } {
            break
            }
            }
            set intf_address_include_file ""
            create_ipi_design intf_address_include_file ${design_name}
            save_bd_design