Closes #73 - PyNQ: Fix base clock
* added type clk to the bd pin and a frequency of 125 MHz * added some debug output * fixed PS parameters (from PyNQ example design)
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* added type clk to the bd pin and a frequency of 125 MHz * added some debug output * fixed PS parameters (from PyNQ example design)
mentioned in commit a831b501
·mentioned in commit a831b501