PCIe: is user offset useful?
The PCIe driver is a bit odd regarding platform_ctl_addr_t
addresses: If nothing else is specified, it will add the base offset for the first PE in the design automatically. This leads to several exception case with special treatment, e.g., to communicate with the platform infrastructure etc. Somewhat mitigated by the dynamic address map, but still - is this useful, or could we just scrap it?
As I recall, DC's justification was to provide an additional safety layer; in my case, the opposite was often the case, because I never knew which addresses would be modified when passed into platform_read_ctl
and platform_write_ctl
. We can do dynamic address checking in these methods while still in user space using the platform_info_t
struct with the address map and prevent any accesses outside the known component's ranges. This might avoid a few bus errors.
Anyone in favor of keeping the user offset logic as is?